From db199502fa8b62afddde5379d94cac0439202111 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Tue, 7 Jul 2015 20:52:07 +0200 Subject: [PATCH] drm/tegra: dp: Read TPS3 capability from sink The TPS3 capability can be exposed by DP 1.2 and later sinks if they support the alternative training pattern for channel equalization. Signed-off-by: Thierry Reding --- drivers/gpu/drm/tegra/dp.c | 3 +++ drivers/gpu/drm/tegra/dp.h | 7 +++++++ 2 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/tegra/dp.c b/drivers/gpu/drm/tegra/dp.c index 97fc0225483f..e22ebab677b9 100644 --- a/drivers/gpu/drm/tegra/dp.c +++ b/drivers/gpu/drm/tegra/dp.c @@ -11,6 +11,7 @@ static void drm_dp_link_caps_reset(struct drm_dp_link_caps *caps) { caps->enhanced_framing = false; + caps->tps3_supported = false; caps->fast_training = false; } @@ -18,6 +19,7 @@ void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest, const struct drm_dp_link_caps *src) { dest->enhanced_framing = src->enhanced_framing; + dest->tps3_supported = src->tps3_supported; dest->fast_training = src->fast_training; } @@ -63,6 +65,7 @@ int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link) link->max_lanes = drm_dp_max_lane_count(dpcd); link->caps.enhanced_framing = drm_dp_enhanced_frame_cap(dpcd); + link->caps.tps3_supported = drm_dp_tps3_supported(dpcd); link->caps.fast_training = drm_dp_fast_training_cap(dpcd); link->rate = link->max_rate; diff --git a/drivers/gpu/drm/tegra/dp.h b/drivers/gpu/drm/tegra/dp.h index d6ae477bab5c..999078812943 100644 --- a/drivers/gpu/drm/tegra/dp.h +++ b/drivers/gpu/drm/tegra/dp.h @@ -23,6 +23,13 @@ struct drm_dp_link_caps { bool enhanced_framing; /** + * tps3_supported: + * + * training pattern sequence 3 supported for equalization + */ + bool tps3_supported; + + /** * @fast_training: * * AUX CH handshake not required for link training -- 2.11.0