From dd095afc88d557f11e5c0613848d97568d675fb7 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Sat, 26 Oct 2019 21:09:17 +0100 Subject: [PATCH] drm/i915/rps: Flip interpretation of ips fmin/fmax to max rps ips uses clock delays as opposed to rps frequency bins. To fit the delays into the same rps calculations, we need to invert the ips delays. Fixes: 3e7abf814193 ("drm/i915: Extract GT render power state management") Signed-off-by: Chris Wilson Cc: Andi Shyti Reviewed-by: Andi Shyti Link: https://patchwork.freedesktop.org/patch/msgid/20191026200917.1780-1-chris@chris-wilson.co.uk --- drivers/gpu/drm/i915/gt/intel_rps.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c index 30f56c786468..032a0c6389f9 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.c +++ b/drivers/gpu/drm/i915/gt/intel_rps.c @@ -180,8 +180,8 @@ static void gen5_rps_init(struct intel_rps *rps) DRM_DEBUG_DRIVER("fmax: %d, fmin: %d, fstart: %d\n", fmax, fmin, fstart); - rps->min_freq = -fstart; - rps->max_freq = -fmin; + rps->min_freq = fmax; + rps->max_freq = fmin; rps->idle_freq = rps->min_freq; rps->cur_freq = rps->idle_freq; @@ -307,7 +307,9 @@ static bool gen5_rps_set(struct intel_rps *rps, u8 val) return false; /* still busy with another command */ } - val = -val; + /* Invert the frequency bin into an ips delay */ + val = rps->max_freq - val; + val = rps->min_freq + val; rgvswctl = (MEMCTL_CMD_CHFREQ << MEMCTL_CMD_SHIFT) | -- 2.11.0