From ddb3d12afa92beb67027e84bbc994b0868446022 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Wed, 10 Jul 2019 15:58:51 +0300 Subject: [PATCH] drm/i915: Don't overestimate 4:2:0 link symbol clock MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit With 4:2:0 output the LS clock can be half of what it is with 4:4:4. Make that happen. Cc: Gwan-gyeong Mun Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20190710125851.3275-1-ville.syrjala@linux.intel.com Reviewed-by: Gwan-gyeong Mun Tested-by: Gwan-gyeong Mun --- drivers/gpu/drm/i915/display/intel_dp.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index a9db16de2999..24592d985bcb 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1854,8 +1854,10 @@ intel_dp_compute_link_config_wide(struct intel_dp *intel_dp, int mode_rate, link_clock, link_avail; for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) { + int output_bpp = intel_dp_output_bpp(pipe_config, bpp); + mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock, - bpp); + output_bpp); for (clock = limits->min_clock; clock <= limits->max_clock; clock++) { for (lane_count = limits->min_lane_count; -- 2.11.0