From de6b1270fbdac054373a47dd7221ac8d3f1badac Mon Sep 17 00:00:00 2001 From: Diana Picus Date: Tue, 28 Feb 2017 13:05:42 +0000 Subject: [PATCH] [ARM] GlobalISel: Select 32-bit G_CONSTANT Put it into a register by means of a MOVi. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296471 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstructionSelector.cpp | 11 +++++++++++ .../CodeGen/ARM/GlobalISel/arm-instruction-select.mir | 19 +++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/lib/Target/ARM/ARMInstructionSelector.cpp b/lib/Target/ARM/ARMInstructionSelector.cpp index dccd717eb99..d7e5220f924 100644 --- a/lib/Target/ARM/ARMInstructionSelector.cpp +++ b/lib/Target/ARM/ARMInstructionSelector.cpp @@ -313,6 +313,17 @@ bool ARMInstructionSelector::select(MachineInstr &I) const { I.setDesc(TII.get(ARM::ADDri)); MIB.addImm(0).add(predOps(ARMCC::AL)).add(condCodeOp()); break; + case G_CONSTANT: { + unsigned Reg = I.getOperand(0).getReg(); + if (MRI.getType(Reg).getSizeInBits() != 32) + return false; + + assert(RBI.getRegBank(Reg, MRI, TRI)->getID() == ARM::GPRRegBankID && + "Expected constant to live in a GPR"); + I.setDesc(TII.get(ARM::MOVi)); + MIB.add(predOps(ARMCC::AL)).add(condCodeOp()); + break; + } case G_STORE: case G_LOAD: { const auto &MemOp = **I.memoperands_begin(); diff --git a/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir b/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir index 847c10c2970..57fea9a5dba 100644 --- a/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir +++ b/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir @@ -19,6 +19,7 @@ define void @test_stores() #0 { ret void } define void @test_gep() { ret void } + define void @test_constants() { ret void } define void @test_soft_fp_double() #0 { ret void } @@ -466,6 +467,24 @@ body: | BX_RET 14, _, implicit %r0 ... --- +name: test_constants +# CHECK-LABEL: name: test_constants +legalized: true +regBankSelected: true +selected: false +# CHECK: selected: true +registers: + - { id: 0, class: gprb } +# CHECK: id: [[C:[0-9]+]], class: gpr +body: | + bb.0: + %0(s32) = G_CONSTANT 42 + ; CHECK: %[[C]] = MOVi 42, 14, _, _ + + %r0 = COPY %0(s32) + BX_RET 14, _, implicit %r0 +... +--- name: test_soft_fp_double # CHECK-LABEL: name: test_soft_fp_double legalized: true -- 2.11.0