From df71b608128b208a4e196e6df81ccf3ca011ea64 Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Fri, 16 Dec 2016 13:13:03 +0000 Subject: [PATCH] [GlobalISel] Silence unused variable warnings in Release builds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289941 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstructionSelector.cpp | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/lib/Target/ARM/ARMInstructionSelector.cpp b/lib/Target/ARM/ARMInstructionSelector.cpp index 5d74d76b707..53298f6476d 100644 --- a/lib/Target/ARM/ARMInstructionSelector.cpp +++ b/lib/Target/ARM/ARMInstructionSelector.cpp @@ -39,13 +39,12 @@ static bool selectCopy(MachineInstr &I, const TargetInstrInfo &TII, return true; const RegisterBank *RegBank = RBI.getRegBank(DstReg, MRI, TRI); + (void)RegBank; assert(RegBank && "Can't get reg bank for virtual register"); - const unsigned DstSize = MRI.getType(DstReg).getSizeInBits(); - unsigned SrcReg = I.getOperand(1).getReg(); - const unsigned SrcSize = RBI.getSizeInBits(SrcReg, MRI, TRI); - (void)SrcSize; - assert(DstSize == SrcSize && "Copy with different width?!"); + assert(MRI.getType(DstReg).getSizeInBits() == + RBI.getSizeInBits(I.getOperand(1).getReg(), MRI, TRI) && + "Copy with different width?!"); assert(RegBank->getID() == ARM::GPRRegBankID && "Unsupported reg bank"); const TargetRegisterClass *RC = &ARM::GPRRegClass; -- 2.11.0