From e0891bd8bfd3349fc3fecde30e51900059f53f11 Mon Sep 17 00:00:00 2001 From: Nathan Rossi Date: Fri, 15 Mar 2013 16:41:59 +0000 Subject: [PATCH] xilinx_spips: Fix bus setup conditional check The R_LQPSI_CFG register has the LQSPI_CFG_SEP_BUS and LQSPI_CFG_TWO_MEM bits. Signed-off-by: Nathan Rossi Signed-off-by: Peter Crosthwaite Message-id: d76c8e364c80a42352ae4f0661aff2cd17ad32a4.1362373359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell --- hw/xilinx_spips.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/xilinx_spips.c b/hw/xilinx_spips.c index 853f4e0b4b..efa1449386 100644 --- a/hw/xilinx_spips.c +++ b/hw/xilinx_spips.c @@ -143,8 +143,8 @@ typedef struct { static inline int num_effective_busses(XilinxSPIPS *s) { - return (s->regs[R_LQSPI_STS] & LQSPI_CFG_SEP_BUS && - s->regs[R_LQSPI_STS] & LQSPI_CFG_TWO_MEM) ? s->num_busses : 1; + return (s->regs[R_LQSPI_CFG] & LQSPI_CFG_SEP_BUS && + s->regs[R_LQSPI_CFG] & LQSPI_CFG_TWO_MEM) ? s->num_busses : 1; } static void xilinx_spips_update_cs_lines(XilinxSPIPS *s) -- 2.11.0