From e22edc7c1df59607dea3cf3d8529097ae38e3ae0 Mon Sep 17 00:00:00 2001 From: Taylor Simpson Date: Thu, 27 Apr 2023 16:00:09 -0700 Subject: [PATCH] Hexagon (target/hexagon) Move new_pred_value to DisasContext The new_pred_value array in the CPUHexagonState is only used for bookkeeping within the translation of a packet. With recent changes that eliminate the need to free TCGv variables, these make more sense to be transient and kept in DisasContext. Suggested-by: Richard Henderson Signed-off-by: Taylor Simpson Reviewed-by: Richard Henderson Message-Id: <20230427230012.3800327-19-tsimpson@quicinc.com> --- target/hexagon/cpu.h | 1 - target/hexagon/gen_tcg.h | 12 ++++++------ target/hexagon/gen_tcg_funcs.py | 2 +- target/hexagon/genptr.c | 10 +++++++--- target/hexagon/idef-parser/parser-helpers.c | 2 +- target/hexagon/op_helper.c | 2 +- target/hexagon/translate.c | 16 ++++++---------- target/hexagon/translate.h | 2 +- 8 files changed, 23 insertions(+), 24 deletions(-) diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index 0ef6d717d0..2b4f77fb8e 100644 --- a/target/hexagon/cpu.h +++ b/target/hexagon/cpu.h @@ -98,7 +98,6 @@ typedef struct CPUArchState { target_ulong this_PC; target_ulong reg_written[TOTAL_PER_THREAD_REGS]; - target_ulong new_pred_value[NUM_PREGS]; target_ulong pred_written; MemLog mem_log_stores[STORES_MAX]; diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h index ed2c1ccc46..d78d99d155 100644 --- a/target/hexagon/gen_tcg.h +++ b/target/hexagon/gen_tcg.h @@ -581,9 +581,9 @@ #define fGEN_TCG_SL2_return_f(SHORTCODE) \ gen_cond_return_subinsn(ctx, TCG_COND_NE, hex_pred[0]) #define fGEN_TCG_SL2_return_tnew(SHORTCODE) \ - gen_cond_return_subinsn(ctx, TCG_COND_EQ, hex_new_pred_value[0]) + gen_cond_return_subinsn(ctx, TCG_COND_EQ, ctx->new_pred_value[0]) #define fGEN_TCG_SL2_return_fnew(SHORTCODE) \ - gen_cond_return_subinsn(ctx, TCG_COND_NE, hex_new_pred_value[0]) + gen_cond_return_subinsn(ctx, TCG_COND_NE, ctx->new_pred_value[0]) /* * Mathematical operations with more than one definition require @@ -1122,7 +1122,7 @@ #define fGEN_TCG_SA1_clrtnew(SHORTCODE) \ do { \ tcg_gen_movcond_tl(TCG_COND_EQ, RdV, \ - hex_new_pred_value[0], tcg_constant_tl(0), \ + ctx->new_pred_value[0], tcg_constant_tl(0), \ RdV, tcg_constant_tl(0)); \ } while (0) @@ -1130,7 +1130,7 @@ #define fGEN_TCG_SA1_clrfnew(SHORTCODE) \ do { \ tcg_gen_movcond_tl(TCG_COND_NE, RdV, \ - hex_new_pred_value[0], tcg_constant_tl(0), \ + ctx->new_pred_value[0], tcg_constant_tl(0), \ RdV, tcg_constant_tl(0)); \ } while (0) @@ -1157,9 +1157,9 @@ gen_cond_jumpr31(ctx, TCG_COND_NE, hex_pred[0]) #define fGEN_TCG_SL2_jumpr31_tnew(SHORTCODE) \ - gen_cond_jumpr31(ctx, TCG_COND_EQ, hex_new_pred_value[0]) + gen_cond_jumpr31(ctx, TCG_COND_EQ, ctx->new_pred_value[0]) #define fGEN_TCG_SL2_jumpr31_fnew(SHORTCODE) \ - gen_cond_jumpr31(ctx, TCG_COND_NE, hex_new_pred_value[0]) + gen_cond_jumpr31(ctx, TCG_COND_NE, ctx->new_pred_value[0]) /* Count trailing zeros/ones */ #define fGEN_TCG_S2_ct0(SHORTCODE) \ diff --git a/target/hexagon/gen_tcg_funcs.py b/target/hexagon/gen_tcg_funcs.py index a36117d57f..0403547387 100755 --- a/target/hexagon/gen_tcg_funcs.py +++ b/target/hexagon/gen_tcg_funcs.py @@ -198,7 +198,7 @@ def genptr_decl_new(f, tag, regtype, regid, regno): if regid in {"t", "u", "v"}: f.write( f" TCGv {regtype}{regid}N = " - f"hex_new_pred_value[insn->regno[{regno}]];\n" + f"ctx->new_pred_value[insn->regno[{regno}]];\n" ) else: print("Bad register parse: ", regtype, regid) diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c index 37210e6f09..1f69f4f922 100644 --- a/target/hexagon/genptr.c +++ b/target/hexagon/genptr.c @@ -121,7 +121,11 @@ static void gen_log_reg_write_pair(DisasContext *ctx, int rnum, TCGv_i64 val) TCGv get_result_pred(DisasContext *ctx, int pnum) { if (ctx->need_commit) { - return hex_new_pred_value[pnum]; + if (ctx->new_pred_value[pnum] == NULL) { + ctx->new_pred_value[pnum] = tcg_temp_new(); + tcg_gen_movi_tl(ctx->new_pred_value[pnum], 0); + } + return ctx->new_pred_value[pnum]; } else { return hex_pred[pnum]; } @@ -607,7 +611,7 @@ static void gen_cmpnd_cmp_jmp(DisasContext *ctx, gen_log_pred_write(ctx, pnum, pred); } else { TCGv pred = tcg_temp_new(); - tcg_gen_mov_tl(pred, hex_new_pred_value[pnum]); + tcg_gen_mov_tl(pred, ctx->new_pred_value[pnum]); gen_cond_jump(ctx, cond2, pred, pc_off); } } @@ -664,7 +668,7 @@ static void gen_cmpnd_tstbit0_jmp(DisasContext *ctx, gen_log_pred_write(ctx, pnum, pred); } else { TCGv pred = tcg_temp_new(); - tcg_gen_mov_tl(pred, hex_new_pred_value[pnum]); + tcg_gen_mov_tl(pred, ctx->new_pred_value[pnum]); gen_cond_jump(ctx, cond, pred, pc_off); } } diff --git a/target/hexagon/idef-parser/parser-helpers.c b/target/hexagon/idef-parser/parser-helpers.c index 09161e394d..6626e006f6 100644 --- a/target/hexagon/idef-parser/parser-helpers.c +++ b/target/hexagon/idef-parser/parser-helpers.c @@ -1854,7 +1854,7 @@ HexValue gen_rvalue_pred(Context *c, YYLTYPE *locp, HexValue *pred) *pred = gen_tmp(c, locp, 32, UNSIGNED); if (is_dotnew) { OUT(c, locp, "tcg_gen_mov_i32(", pred, - ", hex_new_pred_value["); + ", ctx->new_pred_value["); OUT(c, locp, pred_str, "]);\n"); } else { OUT(c, locp, "gen_read_preg(", pred, ", ", pred_str, ");\n"); diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c index fc5c30a141..26fba9f5d6 100644 --- a/target/hexagon/op_helper.c +++ b/target/hexagon/op_helper.c @@ -231,7 +231,7 @@ void HELPER(debug_commit_end)(CPUHexagonState *env, int has_st0, int has_st1) pred_printed = true; } HEX_DEBUG_LOG("\tp%d = 0x" TARGET_FMT_lx "\n", - i, env->new_pred_value[i]); + i, env->pred[i]); } } diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index bca42797c0..459aace921 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -46,7 +46,6 @@ TCGv hex_slot_cancelled; TCGv hex_branch_taken; TCGv hex_new_value_usr; TCGv hex_reg_written[TOTAL_PER_THREAD_REGS]; -TCGv hex_new_pred_value[NUM_PREGS]; TCGv hex_pred_written; TCGv hex_store_addr[STORES_MAX]; TCGv hex_store_width[STORES_MAX]; @@ -515,6 +514,9 @@ static void gen_start_packet(DisasContext *ctx) for (i = 0; i < TOTAL_PER_THREAD_REGS; i++) { ctx->new_value[i] = NULL; } + for (i = 0; i < NUM_PREGS; i++) { + ctx->new_pred_value[i] = NULL; + } analyze_packet(ctx); @@ -568,7 +570,8 @@ static void gen_start_packet(DisasContext *ctx) if (ctx->need_commit && pkt->pkt_has_endloop) { for (int i = 0; i < ctx->preg_log_idx; i++) { int pred_num = ctx->preg_log[i]; - tcg_gen_mov_tl(hex_new_pred_value[pred_num], hex_pred[pred_num]); + ctx->new_pred_value[pred_num] = tcg_temp_new(); + tcg_gen_mov_tl(ctx->new_pred_value[pred_num], hex_pred[pred_num]); } } @@ -691,7 +694,7 @@ static void gen_pred_writes(DisasContext *ctx) for (int i = 0; i < ctx->preg_log_idx; i++) { int pred_num = ctx->preg_log[i]; - tcg_gen_mov_tl(hex_pred[pred_num], hex_new_pred_value[pred_num]); + tcg_gen_mov_tl(hex_pred[pred_num], ctx->new_pred_value[pred_num]); } } @@ -1162,7 +1165,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, #define NAME_LEN 64 static char reg_written_names[TOTAL_PER_THREAD_REGS][NAME_LEN]; -static char new_pred_value_names[NUM_PREGS][NAME_LEN]; static char store_addr_names[STORES_MAX][NAME_LEN]; static char store_width_names[STORES_MAX][NAME_LEN]; static char store_val32_names[STORES_MAX][NAME_LEN]; @@ -1197,12 +1199,6 @@ void hexagon_translate_init(void) hex_pred[i] = tcg_global_mem_new(cpu_env, offsetof(CPUHexagonState, pred[i]), hexagon_prednames[i]); - - snprintf(new_pred_value_names[i], NAME_LEN, "new_pred_%s", - hexagon_prednames[i]); - hex_new_pred_value[i] = tcg_global_mem_new(cpu_env, - offsetof(CPUHexagonState, new_pred_value[i]), - new_pred_value_names[i]); } hex_pred_written = tcg_global_mem_new(cpu_env, offsetof(CPUHexagonState, pred_written), "pred_written"); diff --git a/target/hexagon/translate.h b/target/hexagon/translate.h index 6dde487566..fdfa1b6fe3 100644 --- a/target/hexagon/translate.h +++ b/target/hexagon/translate.h @@ -70,6 +70,7 @@ typedef struct DisasContext { bool short_circuit; bool has_hvx_helper; TCGv new_value[TOTAL_PER_THREAD_REGS]; + TCGv new_pred_value[NUM_PREGS]; } DisasContext; static inline void ctx_log_pred_write(DisasContext *ctx, int pnum) @@ -193,7 +194,6 @@ extern TCGv hex_slot_cancelled; extern TCGv hex_branch_taken; extern TCGv hex_new_value_usr; extern TCGv hex_reg_written[TOTAL_PER_THREAD_REGS]; -extern TCGv hex_new_pred_value[NUM_PREGS]; extern TCGv hex_pred_written; extern TCGv hex_store_addr[STORES_MAX]; extern TCGv hex_store_width[STORES_MAX]; -- 2.11.0