From e3332c20e016224f10e7ae3ccbaa630588c9004c Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Wed, 14 Jan 2015 15:30:09 +1000 Subject: [PATCH] drm/nouveau/mspdec: namespace + nvidia gpu names (no binary change) The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs --- .../gpu/drm/nouveau/include/nvkm/engine/mspdec.h | 7 ++- drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c | 4 +- drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c | 14 ++--- drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c | 18 +++--- drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c | 14 ++--- drivers/gpu/drm/nouveau/nvkm/engine/mspdec/Kbuild | 6 +- .../nouveau/nvkm/engine/mspdec/{nv98.c => g98.c} | 73 +++++++++++----------- .../nouveau/nvkm/engine/mspdec/{nvc0.c => gf100.c} | 73 +++++++++++----------- .../nouveau/nvkm/engine/mspdec/{nve0.c => gk104.c} | 73 +++++++++++----------- 9 files changed, 140 insertions(+), 142 deletions(-) rename drivers/gpu/drm/nouveau/nvkm/engine/mspdec/{nv98.c => g98.c} (61%) rename drivers/gpu/drm/nouveau/nvkm/engine/mspdec/{nvc0.c => gf100.c} (61%) rename drivers/gpu/drm/nouveau/nvkm/engine/mspdec/{nve0.c => gk104.c} (61%) diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/mspdec.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/mspdec.h index 2457f871c2f7..54b7672eed9c 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/mspdec.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/mspdec.h @@ -1,6 +1,7 @@ #ifndef __NVKM_MSPDEC_H__ #define __NVKM_MSPDEC_H__ -extern struct nouveau_oclass nv98_mspdec_oclass; -extern struct nouveau_oclass nvc0_mspdec_oclass; -extern struct nouveau_oclass nve0_mspdec_oclass; +#include +extern struct nvkm_oclass g98_mspdec_oclass; +extern struct nvkm_oclass gf100_mspdec_oclass; +extern struct nvkm_oclass gk104_mspdec_oclass; #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c index bcdc5bdd10cf..67db4e6ca489 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c @@ -95,7 +95,7 @@ gm100_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; #if 0 device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; #endif break; @@ -138,7 +138,7 @@ gm100_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; #endif break; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c index 2db202b1cc3a..9ea3a60ab417 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c @@ -254,7 +254,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nv98_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; device->oclass[NVDEV_ENGINE_SEC ] = &nv98_sec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nv98_msppp_oclass; @@ -312,7 +312,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nv98_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; device->oclass[NVDEV_ENGINE_SEC ] = &nv98_sec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nv98_msppp_oclass; @@ -341,7 +341,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nv98_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; device->oclass[NVDEV_ENGINE_SEC ] = &nv98_sec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nv98_msppp_oclass; @@ -372,7 +372,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nv98_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nv98_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass; @@ -402,7 +402,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nv98_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nv98_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass; @@ -432,7 +432,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nv98_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nv98_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass; @@ -462,7 +462,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nv98_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nv98_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c index 15ed4382e67e..ff39357a2bf2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c @@ -84,7 +84,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf100_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; @@ -117,7 +117,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf104_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; @@ -150,7 +150,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf104_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; @@ -182,7 +182,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf104_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; @@ -215,7 +215,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf104_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; @@ -247,7 +247,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf108_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; @@ -279,7 +279,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf110_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; @@ -312,7 +312,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf119_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; @@ -342,7 +342,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf117_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c index 6c3842ce034b..56c3e67b8962 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c @@ -89,7 +89,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nve0_pm_oclass; break; @@ -123,7 +123,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nve0_pm_oclass; break; @@ -157,7 +157,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nve0_pm_oclass; break; @@ -213,7 +213,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nvf0_pm_oclass; break; @@ -247,7 +247,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nvf0_pm_oclass; break; @@ -281,7 +281,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; break; case 0x108: @@ -314,7 +314,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &nve0_mspdec_oclass; + device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; break; default: diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/Kbuild index c05281cbd9b8..c59c83a67315 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/Kbuild @@ -1,3 +1,3 @@ -nvkm-y += nvkm/engine/mspdec/nv98.o -nvkm-y += nvkm/engine/mspdec/nvc0.o -nvkm-y += nvkm/engine/mspdec/nve0.o +nvkm-y += nvkm/engine/mspdec/g98.o +nvkm-y += nvkm/engine/mspdec/gf100.o +nvkm-y += nvkm/engine/mspdec/gk104.o diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/nv98.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c similarity index 61% rename from drivers/gpu/drm/nouveau/nvkm/engine/mspdec/nv98.c rename to drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c index d47df06bb223..2174577793a4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/nv98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c @@ -21,22 +21,21 @@ * * Authors: Ben Skeggs, Maarten Lankhorst, Ilia Mirkin */ - -#include #include +#include -struct nv98_mspdec_priv { - struct nouveau_falcon base; +struct g98_mspdec_priv { + struct nvkm_falcon base; }; /******************************************************************************* * MSPDEC object classes ******************************************************************************/ -static struct nouveau_oclass -nv98_mspdec_sclass[] = { - { 0x88b2, &nouveau_object_ofuncs }, - { 0x85b2, &nouveau_object_ofuncs }, +static struct nvkm_oclass +g98_mspdec_sclass[] = { + { 0x88b2, &nvkm_object_ofuncs }, + { 0x85b2, &nvkm_object_ofuncs }, {}, }; @@ -44,16 +43,16 @@ nv98_mspdec_sclass[] = { * PMSPDEC context ******************************************************************************/ -static struct nouveau_oclass -nv98_mspdec_cclass = { +static struct nvkm_oclass +g98_mspdec_cclass = { .handle = NV_ENGCTX(MSPDEC, 0x98), - .ofuncs = &(struct nouveau_ofuncs) { - .ctor = _nouveau_falcon_context_ctor, - .dtor = _nouveau_falcon_context_dtor, - .init = _nouveau_falcon_context_init, - .fini = _nouveau_falcon_context_fini, - .rd32 = _nouveau_falcon_context_rd32, - .wr32 = _nouveau_falcon_context_wr32, + .ofuncs = &(struct nvkm_ofuncs) { + .ctor = _nvkm_falcon_context_ctor, + .dtor = _nvkm_falcon_context_dtor, + .init = _nvkm_falcon_context_init, + .fini = _nvkm_falcon_context_fini, + .rd32 = _nvkm_falcon_context_rd32, + .wr32 = _nvkm_falcon_context_wr32, }, }; @@ -62,12 +61,12 @@ nv98_mspdec_cclass = { ******************************************************************************/ static int -nv98_mspdec_init(struct nouveau_object *object) +g98_mspdec_init(struct nvkm_object *object) { - struct nv98_mspdec_priv *priv = (void *)object; + struct g98_mspdec_priv *priv = (void *)object; int ret; - ret = nouveau_falcon_init(&priv->base); + ret = nvkm_falcon_init(&priv->base); if (ret) return ret; @@ -77,34 +76,34 @@ nv98_mspdec_init(struct nouveau_object *object) } static int -nv98_mspdec_ctor(struct nouveau_object *parent, struct nouveau_object *engine, - struct nouveau_oclass *oclass, void *data, u32 size, - struct nouveau_object **pobject) +g98_mspdec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, + struct nvkm_oclass *oclass, void *data, u32 size, + struct nvkm_object **pobject) { - struct nv98_mspdec_priv *priv; + struct g98_mspdec_priv *priv; int ret; - ret = nouveau_falcon_create(parent, engine, oclass, 0x085000, true, - "PMSPDEC", "mspdec", &priv); + ret = nvkm_falcon_create(parent, engine, oclass, 0x085000, true, + "PMSPDEC", "mspdec", &priv); *pobject = nv_object(priv); if (ret) return ret; nv_subdev(priv)->unit = 0x01020000; - nv_engine(priv)->cclass = &nv98_mspdec_cclass; - nv_engine(priv)->sclass = nv98_mspdec_sclass; + nv_engine(priv)->cclass = &g98_mspdec_cclass; + nv_engine(priv)->sclass = g98_mspdec_sclass; return 0; } -struct nouveau_oclass -nv98_mspdec_oclass = { +struct nvkm_oclass +g98_mspdec_oclass = { .handle = NV_ENGINE(MSPDEC, 0x98), - .ofuncs = &(struct nouveau_ofuncs) { - .ctor = nv98_mspdec_ctor, - .dtor = _nouveau_falcon_dtor, - .init = nv98_mspdec_init, - .fini = _nouveau_falcon_fini, - .rd32 = _nouveau_falcon_rd32, - .wr32 = _nouveau_falcon_wr32, + .ofuncs = &(struct nvkm_ofuncs) { + .ctor = g98_mspdec_ctor, + .dtor = _nvkm_falcon_dtor, + .init = g98_mspdec_init, + .fini = _nvkm_falcon_fini, + .rd32 = _nvkm_falcon_rd32, + .wr32 = _nvkm_falcon_wr32, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c similarity index 61% rename from drivers/gpu/drm/nouveau/nvkm/engine/mspdec/nvc0.c rename to drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c index c622010a6722..c814a5f65eb0 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/nvc0.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c @@ -21,21 +21,20 @@ * * Authors: Maarten Lankhorst */ - -#include #include +#include -struct nvc0_mspdec_priv { - struct nouveau_falcon base; +struct gf100_mspdec_priv { + struct nvkm_falcon base; }; /******************************************************************************* * MSPDEC object classes ******************************************************************************/ -static struct nouveau_oclass -nvc0_mspdec_sclass[] = { - { 0x90b2, &nouveau_object_ofuncs }, +static struct nvkm_oclass +gf100_mspdec_sclass[] = { + { 0x90b2, &nvkm_object_ofuncs }, {}, }; @@ -43,16 +42,16 @@ nvc0_mspdec_sclass[] = { * PMSPDEC context ******************************************************************************/ -static struct nouveau_oclass -nvc0_mspdec_cclass = { +static struct nvkm_oclass +gf100_mspdec_cclass = { .handle = NV_ENGCTX(MSPDEC, 0xc0), - .ofuncs = &(struct nouveau_ofuncs) { - .ctor = _nouveau_falcon_context_ctor, - .dtor = _nouveau_falcon_context_dtor, - .init = _nouveau_falcon_context_init, - .fini = _nouveau_falcon_context_fini, - .rd32 = _nouveau_falcon_context_rd32, - .wr32 = _nouveau_falcon_context_wr32, + .ofuncs = &(struct nvkm_ofuncs) { + .ctor = _nvkm_falcon_context_ctor, + .dtor = _nvkm_falcon_context_dtor, + .init = _nvkm_falcon_context_init, + .fini = _nvkm_falcon_context_fini, + .rd32 = _nvkm_falcon_context_rd32, + .wr32 = _nvkm_falcon_context_wr32, }, }; @@ -61,12 +60,12 @@ nvc0_mspdec_cclass = { ******************************************************************************/ static int -nvc0_mspdec_init(struct nouveau_object *object) +gf100_mspdec_init(struct nvkm_object *object) { - struct nvc0_mspdec_priv *priv = (void *)object; + struct gf100_mspdec_priv *priv = (void *)object; int ret; - ret = nouveau_falcon_init(&priv->base); + ret = nvkm_falcon_init(&priv->base); if (ret) return ret; @@ -76,35 +75,35 @@ nvc0_mspdec_init(struct nouveau_object *object) } static int -nvc0_mspdec_ctor(struct nouveau_object *parent, struct nouveau_object *engine, - struct nouveau_oclass *oclass, void *data, u32 size, - struct nouveau_object **pobject) +gf100_mspdec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, + struct nvkm_oclass *oclass, void *data, u32 size, + struct nvkm_object **pobject) { - struct nvc0_mspdec_priv *priv; + struct gf100_mspdec_priv *priv; int ret; - ret = nouveau_falcon_create(parent, engine, oclass, 0x085000, true, - "PMSPDEC", "mspdec", &priv); + ret = nvkm_falcon_create(parent, engine, oclass, 0x085000, true, + "PMSPDEC", "mspdec", &priv); *pobject = nv_object(priv); if (ret) return ret; nv_subdev(priv)->unit = 0x00020000; - nv_subdev(priv)->intr = nouveau_falcon_intr; - nv_engine(priv)->cclass = &nvc0_mspdec_cclass; - nv_engine(priv)->sclass = nvc0_mspdec_sclass; + nv_subdev(priv)->intr = nvkm_falcon_intr; + nv_engine(priv)->cclass = &gf100_mspdec_cclass; + nv_engine(priv)->sclass = gf100_mspdec_sclass; return 0; } -struct nouveau_oclass -nvc0_mspdec_oclass = { +struct nvkm_oclass +gf100_mspdec_oclass = { .handle = NV_ENGINE(MSPDEC, 0xc0), - .ofuncs = &(struct nouveau_ofuncs) { - .ctor = nvc0_mspdec_ctor, - .dtor = _nouveau_falcon_dtor, - .init = nvc0_mspdec_init, - .fini = _nouveau_falcon_fini, - .rd32 = _nouveau_falcon_rd32, - .wr32 = _nouveau_falcon_wr32, + .ofuncs = &(struct nvkm_ofuncs) { + .ctor = gf100_mspdec_ctor, + .dtor = _nvkm_falcon_dtor, + .init = gf100_mspdec_init, + .fini = _nvkm_falcon_fini, + .rd32 = _nvkm_falcon_rd32, + .wr32 = _nvkm_falcon_wr32, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/nve0.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c similarity index 61% rename from drivers/gpu/drm/nouveau/nvkm/engine/mspdec/nve0.c rename to drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c index 84108b5728f9..979920650dbd 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/nve0.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c @@ -21,21 +21,20 @@ * * Authors: Ben Skeggs */ - -#include #include +#include -struct nve0_mspdec_priv { - struct nouveau_falcon base; +struct gk104_mspdec_priv { + struct nvkm_falcon base; }; /******************************************************************************* * MSPDEC object classes ******************************************************************************/ -static struct nouveau_oclass -nve0_mspdec_sclass[] = { - { 0x95b2, &nouveau_object_ofuncs }, +static struct nvkm_oclass +gk104_mspdec_sclass[] = { + { 0x95b2, &nvkm_object_ofuncs }, {}, }; @@ -43,16 +42,16 @@ nve0_mspdec_sclass[] = { * PMSPDEC context ******************************************************************************/ -static struct nouveau_oclass -nve0_mspdec_cclass = { +static struct nvkm_oclass +gk104_mspdec_cclass = { .handle = NV_ENGCTX(MSPDEC, 0xe0), - .ofuncs = &(struct nouveau_ofuncs) { - .ctor = _nouveau_falcon_context_ctor, - .dtor = _nouveau_falcon_context_dtor, - .init = _nouveau_falcon_context_init, - .fini = _nouveau_falcon_context_fini, - .rd32 = _nouveau_falcon_context_rd32, - .wr32 = _nouveau_falcon_context_wr32, + .ofuncs = &(struct nvkm_ofuncs) { + .ctor = _nvkm_falcon_context_ctor, + .dtor = _nvkm_falcon_context_dtor, + .init = _nvkm_falcon_context_init, + .fini = _nvkm_falcon_context_fini, + .rd32 = _nvkm_falcon_context_rd32, + .wr32 = _nvkm_falcon_context_wr32, }, }; @@ -61,12 +60,12 @@ nve0_mspdec_cclass = { ******************************************************************************/ static int -nve0_mspdec_init(struct nouveau_object *object) +gk104_mspdec_init(struct nvkm_object *object) { - struct nve0_mspdec_priv *priv = (void *)object; + struct gk104_mspdec_priv *priv = (void *)object; int ret; - ret = nouveau_falcon_init(&priv->base); + ret = nvkm_falcon_init(&priv->base); if (ret) return ret; @@ -76,35 +75,35 @@ nve0_mspdec_init(struct nouveau_object *object) } static int -nve0_mspdec_ctor(struct nouveau_object *parent, struct nouveau_object *engine, - struct nouveau_oclass *oclass, void *data, u32 size, - struct nouveau_object **pobject) +gk104_mspdec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, + struct nvkm_oclass *oclass, void *data, u32 size, + struct nvkm_object **pobject) { - struct nve0_mspdec_priv *priv; + struct gk104_mspdec_priv *priv; int ret; - ret = nouveau_falcon_create(parent, engine, oclass, 0x085000, true, - "PMSPDEC", "mspdec", &priv); + ret = nvkm_falcon_create(parent, engine, oclass, 0x085000, true, + "PMSPDEC", "mspdec", &priv); *pobject = nv_object(priv); if (ret) return ret; nv_subdev(priv)->unit = 0x00020000; - nv_subdev(priv)->intr = nouveau_falcon_intr; - nv_engine(priv)->cclass = &nve0_mspdec_cclass; - nv_engine(priv)->sclass = nve0_mspdec_sclass; + nv_subdev(priv)->intr = nvkm_falcon_intr; + nv_engine(priv)->cclass = &gk104_mspdec_cclass; + nv_engine(priv)->sclass = gk104_mspdec_sclass; return 0; } -struct nouveau_oclass -nve0_mspdec_oclass = { +struct nvkm_oclass +gk104_mspdec_oclass = { .handle = NV_ENGINE(MSPDEC, 0xe0), - .ofuncs = &(struct nouveau_ofuncs) { - .ctor = nve0_mspdec_ctor, - .dtor = _nouveau_falcon_dtor, - .init = nve0_mspdec_init, - .fini = _nouveau_falcon_fini, - .rd32 = _nouveau_falcon_rd32, - .wr32 = _nouveau_falcon_wr32, + .ofuncs = &(struct nvkm_ofuncs) { + .ctor = gk104_mspdec_ctor, + .dtor = _nvkm_falcon_dtor, + .init = gk104_mspdec_init, + .fini = _nvkm_falcon_fini, + .rd32 = _nvkm_falcon_rd32, + .wr32 = _nvkm_falcon_wr32, }, }; -- 2.11.0