From e3561c23c2fd64712ed1ec7dfdd0bfbcf84356d5 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 15 Aug 2003 05:20:06 +0000 Subject: [PATCH] Remove uses of the NonCopyable class, to make the doxygen output look better git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7880 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/InstrSched/InstrScheduling.cpp | 26 +++++++++++++++-------- lib/Target/SparcV9/InstrSched/InstrScheduling.cpp | 26 +++++++++++++++-------- 2 files changed, 34 insertions(+), 18 deletions(-) diff --git a/lib/CodeGen/InstrSched/InstrScheduling.cpp b/lib/CodeGen/InstrSched/InstrScheduling.cpp index a6222d62a07..ae19a0635e5 100644 --- a/lib/CodeGen/InstrSched/InstrScheduling.cpp +++ b/lib/CodeGen/InstrSched/InstrScheduling.cpp @@ -41,7 +41,10 @@ class SchedulingManager; // in a single cycle. //---------------------------------------------------------------------- -class InstrGroup: public NonCopyable { +class InstrGroup { + InstrGroup(const InstrGroup&); // DO NOT IMPLEMENT + void operator=(const InstrGroup&); // DO NOT IMPLEMENT + public: inline const SchedGraphNode* operator[](unsigned int slotNum) const { assert(slotNum < group.size()); @@ -124,12 +127,14 @@ private: // Represents the schedule of machine instructions for a single basic block. //---------------------------------------------------------------------- -class InstrSchedule: public NonCopyable { -private: +class InstrSchedule { const unsigned int nslots; unsigned int numInstr; std::vector groups; // indexed by cycle number std::vector startTime; // indexed by node id + + InstrSchedule(InstrSchedule&); // DO NOT IMPLEMENT + void operator=(InstrSchedule&); // DO NOT IMPLEMENT public: // iterators typedef ScheduleIterator iterator; @@ -292,14 +297,15 @@ InstrSchedule::end() const // Delay slots are simply indexed by slot number 1 ... numDelaySlots //---------------------------------------------------------------------- -class DelaySlotInfo: public NonCopyable { -private: +class DelaySlotInfo { const SchedGraphNode* brNode; - unsigned int ndelays; + unsigned ndelays; std::vector delayNodeVec; cycles_t delayedNodeCycle; - unsigned int delayedNodeSlotNum; + unsigned delayedNodeSlotNum; + DelaySlotInfo(const DelaySlotInfo &); // DO NOT IMPLEMENT + void operator=(const DelaySlotInfo&); // DO NOT IMPLEMENT public: /*ctor*/ DelaySlotInfo (const SchedGraphNode* _brNode, unsigned _ndelays) @@ -334,7 +340,9 @@ public: // Represents the schedule of machine instructions for a single basic block. //---------------------------------------------------------------------- -class SchedulingManager: public NonCopyable { +class SchedulingManager { + SchedulingManager(SchedulingManager &); // DO NOT IMPLEMENT + void operator=(const SchedulingManager &); // DO NOT IMPLEMENT public: // publicly accessible data members const unsigned nslots; const TargetSchedInfo& schedInfo; @@ -342,7 +350,7 @@ public: // publicly accessible data members InstrSchedule isched; private: - unsigned int totalInstrCount; + unsigned totalInstrCount; cycles_t curTime; cycles_t nextEarliestIssueTime; // next cycle we can issue // indexed by slot# diff --git a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp index a6222d62a07..ae19a0635e5 100644 --- a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp +++ b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp @@ -41,7 +41,10 @@ class SchedulingManager; // in a single cycle. //---------------------------------------------------------------------- -class InstrGroup: public NonCopyable { +class InstrGroup { + InstrGroup(const InstrGroup&); // DO NOT IMPLEMENT + void operator=(const InstrGroup&); // DO NOT IMPLEMENT + public: inline const SchedGraphNode* operator[](unsigned int slotNum) const { assert(slotNum < group.size()); @@ -124,12 +127,14 @@ private: // Represents the schedule of machine instructions for a single basic block. //---------------------------------------------------------------------- -class InstrSchedule: public NonCopyable { -private: +class InstrSchedule { const unsigned int nslots; unsigned int numInstr; std::vector groups; // indexed by cycle number std::vector startTime; // indexed by node id + + InstrSchedule(InstrSchedule&); // DO NOT IMPLEMENT + void operator=(InstrSchedule&); // DO NOT IMPLEMENT public: // iterators typedef ScheduleIterator iterator; @@ -292,14 +297,15 @@ InstrSchedule::end() const // Delay slots are simply indexed by slot number 1 ... numDelaySlots //---------------------------------------------------------------------- -class DelaySlotInfo: public NonCopyable { -private: +class DelaySlotInfo { const SchedGraphNode* brNode; - unsigned int ndelays; + unsigned ndelays; std::vector delayNodeVec; cycles_t delayedNodeCycle; - unsigned int delayedNodeSlotNum; + unsigned delayedNodeSlotNum; + DelaySlotInfo(const DelaySlotInfo &); // DO NOT IMPLEMENT + void operator=(const DelaySlotInfo&); // DO NOT IMPLEMENT public: /*ctor*/ DelaySlotInfo (const SchedGraphNode* _brNode, unsigned _ndelays) @@ -334,7 +340,9 @@ public: // Represents the schedule of machine instructions for a single basic block. //---------------------------------------------------------------------- -class SchedulingManager: public NonCopyable { +class SchedulingManager { + SchedulingManager(SchedulingManager &); // DO NOT IMPLEMENT + void operator=(const SchedulingManager &); // DO NOT IMPLEMENT public: // publicly accessible data members const unsigned nslots; const TargetSchedInfo& schedInfo; @@ -342,7 +350,7 @@ public: // publicly accessible data members InstrSchedule isched; private: - unsigned int totalInstrCount; + unsigned totalInstrCount; cycles_t curTime; cycles_t nextEarliestIssueTime; // next cycle we can issue // indexed by slot# -- 2.11.0