From e6e2784cacd4cfec149a7690976b9ff15e541c4d Mon Sep 17 00:00:00 2001 From: Yongbok Kim Date: Wed, 30 Nov 2016 15:25:04 +0000 Subject: [PATCH] target-mips: fix bad shifts in {dextp|dextpdp} Fixed issues in the MIPSDSP64 instructions dextp and dextpdp. Shifting can go out of 32 bit range. https://bugs.launchpad.net/qemu/+bug/1631625 Reported-by: Thomas Huth Reported-by: Jia Liu Signed-off-by: Yongbok Kim Reviewed-by: Thomas Huth --- target-mips/dsp_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c index df7d2204b0..dc707934ea 100644 --- a/target-mips/dsp_helper.c +++ b/target-mips/dsp_helper.c @@ -3477,7 +3477,7 @@ target_ulong helper_dextp(target_ulong ac, target_ulong size, CPUMIPSState *env) if (sub >= -1) { temp = (tempB << (64 - len)) | (tempA >> len); - temp = temp & ((0x01 << (size + 1)) - 1); + temp = temp & ((1ULL << (size + 1)) - 1); set_DSPControl_efi(0, env); } else { set_DSPControl_efi(1, env); @@ -3506,7 +3506,7 @@ target_ulong helper_dextpdp(target_ulong ac, target_ulong size, if (sub >= -1) { temp = (tempB << (64 - len)) | (tempA >> len); - temp = temp & ((0x01 << (size + 1)) - 1); + temp = temp & ((1ULL << (size + 1)) - 1); set_DSPControl_pos(sub, env); set_DSPControl_efi(0, env); } else { -- 2.11.0