From e7b6244965e058022e686d697a6c02e871720b39 Mon Sep 17 00:00:00 2001 From: Davide Italiano Date: Sun, 9 Jul 2017 19:22:48 +0000 Subject: [PATCH] [X86] Relax an assertion when legalizing vector types. WidenVSELECTAndMask can fold (and it folds in this case) so we get a BUILD_VECTOR of constants as mask. convertMask() seems to work fine when the input is a vector of constants, and we still need to call it to extend/add elements at the end. but the current code just asserts on anything but a SETCC or AND/OR/XOR of 2xSETCC. This change was discussed briefly with Simon Pilgrim, who also suggests we might consider dropping this assertion in the future. Fixes PR33715. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307508 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 4 ++++ test/CodeGen/X86/pr33715.ll | 16 ++++++++++++++++ 2 files changed, 20 insertions(+) create mode 100644 test/CodeGen/X86/pr33715.ll diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp index ff0e609803d..d41054b15bb 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp @@ -2977,7 +2977,11 @@ SDValue DAGTypeLegalizer::convertMask(SDValue InMask, EVT MaskVT, // Currently a SETCC or a AND/OR/XOR with two SETCCs are handled. unsigned InMaskOpc = InMask->getOpcode(); + + // FIXME: This code seems to be too restrictive, we might consider + // generalizing it or dropping it. assert((InMaskOpc == ISD::SETCC || + ISD::isBuildVectorOfConstantSDNodes(InMask.getNode()) || (isLogicalMaskOp(InMaskOpc) && isSETCCorConvertedSETCC(InMask->getOperand(0)) && isSETCCorConvertedSETCC(InMask->getOperand(1)))) && diff --git a/test/CodeGen/X86/pr33715.ll b/test/CodeGen/X86/pr33715.ll new file mode 100644 index 00000000000..15432cfdb51 --- /dev/null +++ b/test/CodeGen/X86/pr33715.ll @@ -0,0 +1,16 @@ +; Make sure we don't crash with a build vector of integer constants. +; RUN: llc %s -o /dev/null + +target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" +target triple = "x86_64-unknown-linux-gnu" + +define i32 @patatino() { + %tmp = insertelement <4 x i32> , i32 1, i32 2 + %tmp1 = insertelement <4 x i32> %tmp, i32 1, i32 3 + %tmp2 = icmp ne <4 x i32> %tmp1, zeroinitializer + %tmp3 = icmp slt <4 x i32> %tmp1, + %tmp4 = or <4 x i1> %tmp2, %tmp3 + %tmp5 = select <4 x i1> %tmp4, <4 x i32> zeroinitializer, <4 x i32> + %tmp6 = extractelement <4 x i32> %tmp5, i32 0 + ret i32 %tmp6 +} -- 2.11.0