From e8901f3ab5b5c2ce75abdcd182b07d00fd6746fe Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 22 Sep 2017 14:58:23 +0900 Subject: [PATCH] dt-bindings: nand: denali: reduce the register space in the example This example allocates much more than needed for address regions. As for "denali_reg", as you see in drivers/mtd/nand/denali.h, all registers fit in 0x1000. As for "nand_data", this IP is generally configured to use Indexed Addressing mode, where there are only two registers in the address translation module (CTRL: 0x00, DATA: 0x10). Altera SOCFPGA is also this case. So, 0x20 is enough. Signed-off-by: Masahiro Yamada Acked-by: Rob Herring Signed-off-by: Boris Brezillon --- Documentation/devicetree/bindings/mtd/denali-nand.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/denali-nand.txt b/Documentation/devicetree/bindings/mtd/denali-nand.txt index 504291d2e5c2..0ee8edb60efc 100644 --- a/Documentation/devicetree/bindings/mtd/denali-nand.txt +++ b/Documentation/devicetree/bindings/mtd/denali-nand.txt @@ -29,7 +29,7 @@ nand: nand@ff900000 { #address-cells = <1>; #size-cells = <1>; compatible = "altr,socfpga-denali-nand"; - reg = <0xff900000 0x100000>, <0xffb80000 0x10000>; + reg = <0xff900000 0x20>, <0xffb80000 0x1000>; reg-names = "nand_data", "denali_reg"; interrupts = <0 144 4>; }; -- 2.11.0