From e94aa9640188fa2223b0b084666d957e34bf1ff7 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Thu, 7 Dec 2017 17:37:39 +0000 Subject: [PATCH] [X86] Tag BMI/BMI2/TBM instructions scheduler classes Put these under UNARY/BINOP ALU itinerary classes for now - seems to be a good average value git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320064 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrInfo.td | 32 ++++++++--------- test/CodeGen/X86/bmi-schedule.ll | 64 ++++++++++++++++----------------- test/CodeGen/X86/bmi2-schedule.ll | 24 ++++++------- test/CodeGen/X86/tbm-schedule.ll | 76 ++++++++++++++++++++------------------- 4 files changed, 100 insertions(+), 96 deletions(-) diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 0931a9c98d1..1a495bf56df 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -2304,11 +2304,11 @@ multiclass bmi_bls, T8PS, VEX_4V; + [], IIC_UNARY_REG>, T8PS, VEX_4V, Sched<[WriteALU]>; let mayLoad = 1 in def rm : I<0xF3, MemMRM, (outs RC:$dst), (ins x86memop:$src), !strconcat(mnemonic, "\t{$src, $dst|$dst, $src}"), - []>, T8PS, VEX_4V; + [], IIC_UNARY_MEM>, T8PS, VEX_4V, Sched<[WriteALULd, ReadAfterLd]>; } } @@ -2343,18 +2343,18 @@ let Predicates = [HasBMI] in { (BLSI64rr GR64:$src)>; } - multiclass bmi_bextr_bzhi opc, string mnemonic, RegisterClass RC, X86MemOperand x86memop, Intrinsic Int, PatFrag ld_frag> { def rr : I, - T8PS, VEX; + [(set RC:$dst, (Int RC:$src1, RC:$src2)), (implicit EFLAGS)], IIC_BIN_NONMEM>, + T8PS, VEX, Sched<[WriteALU]>; def rm : I, T8PS, VEX; + (implicit EFLAGS)], IIC_BIN_MEM>, T8PS, VEX, + Sched<[WriteALULd, ReadAfterLd]>; } let Predicates = [HasBMI], Defs = [EFLAGS] in { @@ -2371,7 +2371,6 @@ let Predicates = [HasBMI2], Defs = [EFLAGS] in { int_x86_bmi_bzhi_64, loadi64>, VEX_W; } - def CountTrailingOnes : SDNodeXFormgetZExtValue()), SDLoc(N)); @@ -2465,11 +2464,12 @@ multiclass bmi_pdep_pext { def rr : I<0xF5, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2), !strconcat(mnemonic, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"), - [(set RC:$dst, (Int RC:$src1, RC:$src2))]>, - VEX_4V; + [(set RC:$dst, (Int RC:$src1, RC:$src2))], IIC_BIN_NONMEM>, + VEX_4V, Sched<[WriteALU]>; def rm : I<0xF5, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2), !strconcat(mnemonic, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"), - [(set RC:$dst, (Int RC:$src1, (ld_frag addr:$src2)))]>, VEX_4V; + [(set RC:$dst, (Int RC:$src1, (ld_frag addr:$src2)))], + IIC_BIN_MEM>, VEX_4V, Sched<[WriteALULd, ReadAfterLd]>; } let Predicates = [HasBMI2] in { @@ -2495,14 +2495,14 @@ multiclass tbm_ternary_imm_intr opc, RegisterClass RC, string OpcodeStr, def ri : Ii32, - XOP, XOPA; + [(set RC:$dst, (Int RC:$src1, immoperator:$cntl))], + IIC_BIN_NONMEM>, XOP, XOPA, Sched<[WriteALU]>; def mi : Ii32, - XOP, XOPA; + [(set RC:$dst, (Int (ld_frag addr:$src1), immoperator:$cntl))], + IIC_BIN_MEM>, XOP, XOPA, Sched<[WriteALULd, ReadAfterLd]>; } defm BEXTRI32 : tbm_ternary_imm_intr<0x10, GR32, "bextr", i32mem, loadi32, @@ -2518,11 +2518,11 @@ multiclass tbm_binary_rm opc, Format FormReg, Format FormMem, let hasSideEffects = 0 in { def rr : I, XOP_4V, XOP9; + [], IIC_BIN_NONMEM>, XOP_4V, XOP9, Sched<[WriteALU]>; let mayLoad = 1 in def rm : I, XOP_4V, XOP9; + [], IIC_BIN_MEM>, XOP_4V, XOP9, Sched<[WriteALULd, ReadAfterLd]>; } } diff --git a/test/CodeGen/X86/bmi-schedule.ll b/test/CodeGen/X86/bmi-schedule.ll index fcbe66448ad..981c1923177 100644 --- a/test/CodeGen/X86/bmi-schedule.ll +++ b/test/CodeGen/X86/bmi-schedule.ll @@ -172,8 +172,8 @@ define i64 @test_andn_i64(i64 %a0, i64 %a1, i64 *%a2) { define i32 @test_bextr_i32(i32 %a0, i32 %a1, i32 *%a2) { ; GENERIC-LABEL: test_bextr_i32: ; GENERIC: # %bb.0: -; GENERIC-NEXT: bextrl %edi, (%rdx), %ecx -; GENERIC-NEXT: bextrl %edi, %esi, %eax +; GENERIC-NEXT: bextrl %edi, (%rdx), %ecx # sched: [5:0.50] +; GENERIC-NEXT: bextrl %edi, %esi, %eax # sched: [1:0.33] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -200,8 +200,8 @@ define i32 @test_bextr_i32(i32 %a0, i32 %a1, i32 *%a2) { ; ; BTVER2-LABEL: test_bextr_i32: ; BTVER2: # %bb.0: -; BTVER2-NEXT: bextrl %edi, (%rdx), %ecx -; BTVER2-NEXT: bextrl %edi, %esi, %eax +; BTVER2-NEXT: bextrl %edi, (%rdx), %ecx # sched: [4:1.00] +; BTVER2-NEXT: bextrl %edi, %esi, %eax # sched: [1:0.50] ; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -222,8 +222,8 @@ declare i32 @llvm.x86.bmi.bextr.32(i32, i32) define i64 @test_bextr_i64(i64 %a0, i64 %a1, i64 *%a2) { ; GENERIC-LABEL: test_bextr_i64: ; GENERIC: # %bb.0: -; GENERIC-NEXT: bextrq %rdi, (%rdx), %rcx -; GENERIC-NEXT: bextrq %rdi, %rsi, %rax +; GENERIC-NEXT: bextrq %rdi, (%rdx), %rcx # sched: [5:0.50] +; GENERIC-NEXT: bextrq %rdi, %rsi, %rax # sched: [1:0.33] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -250,8 +250,8 @@ define i64 @test_bextr_i64(i64 %a0, i64 %a1, i64 *%a2) { ; ; BTVER2-LABEL: test_bextr_i64: ; BTVER2: # %bb.0: -; BTVER2-NEXT: bextrq %rdi, (%rdx), %rcx -; BTVER2-NEXT: bextrq %rdi, %rsi, %rax +; BTVER2-NEXT: bextrq %rdi, (%rdx), %rcx # sched: [4:1.00] +; BTVER2-NEXT: bextrq %rdi, %rsi, %rax # sched: [1:0.50] ; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -272,8 +272,8 @@ declare i64 @llvm.x86.bmi.bextr.64(i64, i64) define i32 @test_blsi_i32(i32 %a0, i32 *%a1) { ; GENERIC-LABEL: test_blsi_i32: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blsil (%rsi), %ecx -; GENERIC-NEXT: blsil %edi, %eax +; GENERIC-NEXT: blsil (%rsi), %ecx # sched: [5:0.50] +; GENERIC-NEXT: blsil %edi, %eax # sched: [1:0.33] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -300,8 +300,8 @@ define i32 @test_blsi_i32(i32 %a0, i32 *%a1) { ; ; BTVER2-LABEL: test_blsi_i32: ; BTVER2: # %bb.0: -; BTVER2-NEXT: blsil (%rsi), %ecx -; BTVER2-NEXT: blsil %edi, %eax +; BTVER2-NEXT: blsil (%rsi), %ecx # sched: [4:1.00] +; BTVER2-NEXT: blsil %edi, %eax # sched: [1:0.50] ; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -323,8 +323,8 @@ define i32 @test_blsi_i32(i32 %a0, i32 *%a1) { define i64 @test_blsi_i64(i64 %a0, i64 *%a1) { ; GENERIC-LABEL: test_blsi_i64: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blsiq (%rsi), %rcx -; GENERIC-NEXT: blsiq %rdi, %rax +; GENERIC-NEXT: blsiq (%rsi), %rcx # sched: [5:0.50] +; GENERIC-NEXT: blsiq %rdi, %rax # sched: [1:0.33] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -351,8 +351,8 @@ define i64 @test_blsi_i64(i64 %a0, i64 *%a1) { ; ; BTVER2-LABEL: test_blsi_i64: ; BTVER2: # %bb.0: -; BTVER2-NEXT: blsiq (%rsi), %rcx -; BTVER2-NEXT: blsiq %rdi, %rax +; BTVER2-NEXT: blsiq (%rsi), %rcx # sched: [4:1.00] +; BTVER2-NEXT: blsiq %rdi, %rax # sched: [1:0.50] ; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -374,8 +374,8 @@ define i64 @test_blsi_i64(i64 %a0, i64 *%a1) { define i32 @test_blsmsk_i32(i32 %a0, i32 *%a1) { ; GENERIC-LABEL: test_blsmsk_i32: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blsmskl (%rsi), %ecx -; GENERIC-NEXT: blsmskl %edi, %eax +; GENERIC-NEXT: blsmskl (%rsi), %ecx # sched: [5:0.50] +; GENERIC-NEXT: blsmskl %edi, %eax # sched: [1:0.33] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -402,8 +402,8 @@ define i32 @test_blsmsk_i32(i32 %a0, i32 *%a1) { ; ; BTVER2-LABEL: test_blsmsk_i32: ; BTVER2: # %bb.0: -; BTVER2-NEXT: blsmskl (%rsi), %ecx -; BTVER2-NEXT: blsmskl %edi, %eax +; BTVER2-NEXT: blsmskl (%rsi), %ecx # sched: [4:1.00] +; BTVER2-NEXT: blsmskl %edi, %eax # sched: [1:0.50] ; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -425,8 +425,8 @@ define i32 @test_blsmsk_i32(i32 %a0, i32 *%a1) { define i64 @test_blsmsk_i64(i64 %a0, i64 *%a1) { ; GENERIC-LABEL: test_blsmsk_i64: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blsmskq (%rsi), %rcx -; GENERIC-NEXT: blsmskq %rdi, %rax +; GENERIC-NEXT: blsmskq (%rsi), %rcx # sched: [5:0.50] +; GENERIC-NEXT: blsmskq %rdi, %rax # sched: [1:0.33] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -453,8 +453,8 @@ define i64 @test_blsmsk_i64(i64 %a0, i64 *%a1) { ; ; BTVER2-LABEL: test_blsmsk_i64: ; BTVER2: # %bb.0: -; BTVER2-NEXT: blsmskq (%rsi), %rcx -; BTVER2-NEXT: blsmskq %rdi, %rax +; BTVER2-NEXT: blsmskq (%rsi), %rcx # sched: [4:1.00] +; BTVER2-NEXT: blsmskq %rdi, %rax # sched: [1:0.50] ; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -476,8 +476,8 @@ define i64 @test_blsmsk_i64(i64 %a0, i64 *%a1) { define i32 @test_blsr_i32(i32 %a0, i32 *%a1) { ; GENERIC-LABEL: test_blsr_i32: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blsrl (%rsi), %ecx -; GENERIC-NEXT: blsrl %edi, %eax +; GENERIC-NEXT: blsrl (%rsi), %ecx # sched: [5:0.50] +; GENERIC-NEXT: blsrl %edi, %eax # sched: [1:0.33] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -504,8 +504,8 @@ define i32 @test_blsr_i32(i32 %a0, i32 *%a1) { ; ; BTVER2-LABEL: test_blsr_i32: ; BTVER2: # %bb.0: -; BTVER2-NEXT: blsrl (%rsi), %ecx -; BTVER2-NEXT: blsrl %edi, %eax +; BTVER2-NEXT: blsrl (%rsi), %ecx # sched: [4:1.00] +; BTVER2-NEXT: blsrl %edi, %eax # sched: [1:0.50] ; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -527,8 +527,8 @@ define i32 @test_blsr_i32(i32 %a0, i32 *%a1) { define i64 @test_blsr_i64(i64 %a0, i64 *%a1) { ; GENERIC-LABEL: test_blsr_i64: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blsrq (%rsi), %rcx -; GENERIC-NEXT: blsrq %rdi, %rax +; GENERIC-NEXT: blsrq (%rsi), %rcx # sched: [5:0.50] +; GENERIC-NEXT: blsrq %rdi, %rax # sched: [1:0.33] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -555,8 +555,8 @@ define i64 @test_blsr_i64(i64 %a0, i64 *%a1) { ; ; BTVER2-LABEL: test_blsr_i64: ; BTVER2: # %bb.0: -; BTVER2-NEXT: blsrq (%rsi), %rcx -; BTVER2-NEXT: blsrq %rdi, %rax +; BTVER2-NEXT: blsrq (%rsi), %rcx # sched: [4:1.00] +; BTVER2-NEXT: blsrq %rdi, %rax # sched: [1:0.50] ; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; diff --git a/test/CodeGen/X86/bmi2-schedule.ll b/test/CodeGen/X86/bmi2-schedule.ll index 1c36262cff5..807e8d515e2 100644 --- a/test/CodeGen/X86/bmi2-schedule.ll +++ b/test/CodeGen/X86/bmi2-schedule.ll @@ -9,8 +9,8 @@ define i32 @test_bzhi_i32(i32 %a0, i32 %a1, i32 *%a2) { ; GENERIC-LABEL: test_bzhi_i32: ; GENERIC: # %bb.0: -; GENERIC-NEXT: bzhil %edi, (%rdx), %ecx -; GENERIC-NEXT: bzhil %edi, %esi, %eax +; GENERIC-NEXT: bzhil %edi, (%rdx), %ecx # sched: [5:0.50] +; GENERIC-NEXT: bzhil %edi, %esi, %eax # sched: [1:0.33] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -59,8 +59,8 @@ declare i32 @llvm.x86.bmi.bzhi.32(i32, i32) define i64 @test_bzhi_i64(i64 %a0, i64 %a1, i64 *%a2) { ; GENERIC-LABEL: test_bzhi_i64: ; GENERIC: # %bb.0: -; GENERIC-NEXT: bzhiq %rdi, (%rdx), %rcx -; GENERIC-NEXT: bzhiq %rdi, %rsi, %rax +; GENERIC-NEXT: bzhiq %rdi, (%rdx), %rcx # sched: [5:0.50] +; GENERIC-NEXT: bzhiq %rdi, %rsi, %rax # sched: [1:0.33] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -179,8 +179,8 @@ define i64 @test_mulx_i64(i64 %a0, i64 %a1, i64 *%a2) { define i32 @test_pdep_i32(i32 %a0, i32 %a1, i32 *%a2) { ; GENERIC-LABEL: test_pdep_i32: ; GENERIC: # %bb.0: -; GENERIC-NEXT: pdepl (%rdx), %edi, %ecx -; GENERIC-NEXT: pdepl %esi, %edi, %eax +; GENERIC-NEXT: pdepl (%rdx), %edi, %ecx # sched: [5:0.50] +; GENERIC-NEXT: pdepl %esi, %edi, %eax # sched: [1:0.33] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -229,8 +229,8 @@ declare i32 @llvm.x86.bmi.pdep.32(i32, i32) define i64 @test_pdep_i64(i64 %a0, i64 %a1, i64 *%a2) { ; GENERIC-LABEL: test_pdep_i64: ; GENERIC: # %bb.0: -; GENERIC-NEXT: pdepq (%rdx), %rdi, %rcx -; GENERIC-NEXT: pdepq %rsi, %rdi, %rax +; GENERIC-NEXT: pdepq (%rdx), %rdi, %rcx # sched: [5:0.50] +; GENERIC-NEXT: pdepq %rsi, %rdi, %rax # sched: [1:0.33] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -279,8 +279,8 @@ declare i64 @llvm.x86.bmi.pdep.64(i64, i64) define i32 @test_pext_i32(i32 %a0, i32 %a1, i32 *%a2) { ; GENERIC-LABEL: test_pext_i32: ; GENERIC: # %bb.0: -; GENERIC-NEXT: pextl (%rdx), %edi, %ecx -; GENERIC-NEXT: pextl %esi, %edi, %eax +; GENERIC-NEXT: pextl (%rdx), %edi, %ecx # sched: [5:0.50] +; GENERIC-NEXT: pextl %esi, %edi, %eax # sched: [1:0.33] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -329,8 +329,8 @@ declare i32 @llvm.x86.bmi.pext.32(i32, i32) define i64 @test_pext_i64(i64 %a0, i64 %a1, i64 *%a2) { ; GENERIC-LABEL: test_pext_i64: ; GENERIC: # %bb.0: -; GENERIC-NEXT: pextq (%rdx), %rdi, %rcx -; GENERIC-NEXT: pextq %rsi, %rdi, %rax +; GENERIC-NEXT: pextq (%rdx), %rdi, %rcx # sched: [5:0.50] +; GENERIC-NEXT: pextq %rsi, %rdi, %rax # sched: [1:0.33] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; diff --git a/test/CodeGen/X86/tbm-schedule.ll b/test/CodeGen/X86/tbm-schedule.ll index eb0372cd823..9bb7870506f 100644 --- a/test/CodeGen/X86/tbm-schedule.ll +++ b/test/CodeGen/X86/tbm-schedule.ll @@ -8,7 +8,9 @@ define i32 @test_x86_tbm_bextri_u32(i32 %a0, i32* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_bextri_u32: ; GENERIC: # %bb.0: ; GENERIC-NEXT: bextr $3076, %edi, %ecx # imm = 0xC04 +; GENERIC-NEXT: # sched: [1:0.33] ; GENERIC-NEXT: bextr $3076, (%rsi), %eax # imm = 0xC04 +; GENERIC-NEXT: # sched: [5:0.50] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -31,7 +33,9 @@ define i64 @test_x86_tbm_bextri_u64(i64 %a0, i64* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_bextri_u64: ; GENERIC: # %bb.0: ; GENERIC-NEXT: bextr $3076, %edi, %ecx # imm = 0xC04 +; GENERIC-NEXT: # sched: [1:0.33] ; GENERIC-NEXT: bextr $3076, (%rsi), %eax # imm = 0xC04 +; GENERIC-NEXT: # sched: [5:0.50] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -53,8 +57,8 @@ define i64 @test_x86_tbm_bextri_u64(i64 %a0, i64* nocapture %p1) nounwind { define i32 @test_x86_tbm_blcfill_u32(i32 %a0, i32* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_blcfill_u32: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blcfill %edi, %ecx -; GENERIC-NEXT: blcfill (%rsi), %eax +; GENERIC-NEXT: blcfill %edi, %ecx # sched: [1:0.33] +; GENERIC-NEXT: blcfill (%rsi), %eax # sched: [5:0.50] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -76,8 +80,8 @@ define i32 @test_x86_tbm_blcfill_u32(i32 %a0, i32* nocapture %p1) nounwind { define i64 @test_x86_tbm_blcfill_u64(i64 %a0, i64* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_blcfill_u64: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blcfill %rdi, %rcx -; GENERIC-NEXT: blcfill (%rsi), %rax +; GENERIC-NEXT: blcfill %rdi, %rcx # sched: [1:0.33] +; GENERIC-NEXT: blcfill (%rsi), %rax # sched: [5:0.50] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -99,8 +103,8 @@ define i64 @test_x86_tbm_blcfill_u64(i64 %a0, i64* nocapture %p1) nounwind { define i32 @test_x86_tbm_blci_u32(i32 %a0, i32* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_blci_u32: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blci %edi, %ecx -; GENERIC-NEXT: blci (%rsi), %eax +; GENERIC-NEXT: blci %edi, %ecx # sched: [1:0.33] +; GENERIC-NEXT: blci (%rsi), %eax # sched: [5:0.50] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -124,8 +128,8 @@ define i32 @test_x86_tbm_blci_u32(i32 %a0, i32* nocapture %p1) nounwind { define i64 @test_x86_tbm_blci_u64(i64 %a0, i64* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_blci_u64: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blci %rdi, %rcx -; GENERIC-NEXT: blci (%rsi), %rax +; GENERIC-NEXT: blci %rdi, %rcx # sched: [1:0.33] +; GENERIC-NEXT: blci (%rsi), %rax # sched: [5:0.50] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -149,8 +153,8 @@ define i64 @test_x86_tbm_blci_u64(i64 %a0, i64* nocapture %p1) nounwind { define i32 @test_x86_tbm_blcic_u32(i32 %a0, i32* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_blcic_u32: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blcic %edi, %ecx -; GENERIC-NEXT: blcic (%rsi), %eax +; GENERIC-NEXT: blcic %edi, %ecx # sched: [1:0.33] +; GENERIC-NEXT: blcic (%rsi), %eax # sched: [5:0.50] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -174,8 +178,8 @@ define i32 @test_x86_tbm_blcic_u32(i32 %a0, i32* nocapture %p1) nounwind { define i64 @test_x86_tbm_blcic_u64(i64 %a0, i64* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_blcic_u64: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blcic %rdi, %rcx -; GENERIC-NEXT: blcic (%rsi), %rax +; GENERIC-NEXT: blcic %rdi, %rcx # sched: [1:0.33] +; GENERIC-NEXT: blcic (%rsi), %rax # sched: [5:0.50] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -199,8 +203,8 @@ define i64 @test_x86_tbm_blcic_u64(i64 %a0, i64* nocapture %p1) nounwind { define i32 @test_x86_tbm_blcmsk_u32(i32 %a0, i32* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_blcmsk_u32: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blcmsk %edi, %ecx -; GENERIC-NEXT: blcmsk (%rsi), %eax +; GENERIC-NEXT: blcmsk %edi, %ecx # sched: [1:0.33] +; GENERIC-NEXT: blcmsk (%rsi), %eax # sched: [5:0.50] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -222,8 +226,8 @@ define i32 @test_x86_tbm_blcmsk_u32(i32 %a0, i32* nocapture %p1) nounwind { define i64 @test_x86_tbm_blcmsk_u64(i64 %a0, i64* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_blcmsk_u64: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blcmsk %rdi, %rcx -; GENERIC-NEXT: blcmsk (%rsi), %rax +; GENERIC-NEXT: blcmsk %rdi, %rcx # sched: [1:0.33] +; GENERIC-NEXT: blcmsk (%rsi), %rax # sched: [5:0.50] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -245,8 +249,8 @@ define i64 @test_x86_tbm_blcmsk_u64(i64 %a0, i64* nocapture %p1) nounwind { define i32 @test_x86_tbm_blcs_u32(i32 %a0, i32* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_blcs_u32: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blcs %edi, %ecx -; GENERIC-NEXT: blcs (%rsi), %eax +; GENERIC-NEXT: blcs %edi, %ecx # sched: [1:0.33] +; GENERIC-NEXT: blcs (%rsi), %eax # sched: [5:0.50] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -268,8 +272,8 @@ define i32 @test_x86_tbm_blcs_u32(i32 %a0, i32* nocapture %p1) nounwind { define i64 @test_x86_tbm_blcs_u64(i64 %a0, i64* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_blcs_u64: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blcs %rdi, %rcx -; GENERIC-NEXT: blcs (%rsi), %rax +; GENERIC-NEXT: blcs %rdi, %rcx # sched: [1:0.33] +; GENERIC-NEXT: blcs (%rsi), %rax # sched: [5:0.50] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -291,8 +295,8 @@ define i64 @test_x86_tbm_blcs_u64(i64 %a0, i64* nocapture %p1) nounwind { define i32 @test_x86_tbm_blsfill_u32(i32 %a0, i32* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_blsfill_u32: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blsfill %edi, %ecx -; GENERIC-NEXT: blsfill (%rsi), %eax +; GENERIC-NEXT: blsfill %edi, %ecx # sched: [1:0.33] +; GENERIC-NEXT: blsfill (%rsi), %eax # sched: [5:0.50] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -314,8 +318,8 @@ define i32 @test_x86_tbm_blsfill_u32(i32 %a0, i32* nocapture %p1) nounwind { define i64 @test_x86_tbm_blsfill_u64(i64 %a0, i64* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_blsfill_u64: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blsfill %rdi, %rcx -; GENERIC-NEXT: blsfill (%rsi), %rax +; GENERIC-NEXT: blsfill %rdi, %rcx # sched: [1:0.33] +; GENERIC-NEXT: blsfill (%rsi), %rax # sched: [5:0.50] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -337,8 +341,8 @@ define i64 @test_x86_tbm_blsfill_u64(i64 %a0, i64* nocapture %p1) nounwind { define i32 @test_x86_tbm_blsic_u32(i32 %a0, i32* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_blsic_u32: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blsic %edi, %ecx -; GENERIC-NEXT: blsic (%rsi), %eax +; GENERIC-NEXT: blsic %edi, %ecx # sched: [1:0.33] +; GENERIC-NEXT: blsic (%rsi), %eax # sched: [5:0.50] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -362,8 +366,8 @@ define i32 @test_x86_tbm_blsic_u32(i32 %a0, i32* nocapture %p1) nounwind { define i64 @test_x86_tbm_blsic_u64(i64 %a0, i64* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_blsic_u64: ; GENERIC: # %bb.0: -; GENERIC-NEXT: blsic %rdi, %rcx -; GENERIC-NEXT: blsic (%rsi), %rax +; GENERIC-NEXT: blsic %rdi, %rcx # sched: [1:0.33] +; GENERIC-NEXT: blsic (%rsi), %rax # sched: [5:0.50] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -387,8 +391,8 @@ define i64 @test_x86_tbm_blsic_u64(i64 %a0, i64* nocapture %p1) nounwind { define i32 @test_x86_tbm_t1mskc_u32(i32 %a0, i32* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_t1mskc_u32: ; GENERIC: # %bb.0: -; GENERIC-NEXT: t1mskc %edi, %ecx -; GENERIC-NEXT: t1mskc (%rsi), %eax +; GENERIC-NEXT: t1mskc %edi, %ecx # sched: [1:0.33] +; GENERIC-NEXT: t1mskc (%rsi), %eax # sched: [5:0.50] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -412,8 +416,8 @@ define i32 @test_x86_tbm_t1mskc_u32(i32 %a0, i32* nocapture %p1) nounwind { define i64 @test_x86_tbm_t1mskc_u64(i64 %a0, i64* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_t1mskc_u64: ; GENERIC: # %bb.0: -; GENERIC-NEXT: t1mskc %rdi, %rcx -; GENERIC-NEXT: t1mskc (%rsi), %rax +; GENERIC-NEXT: t1mskc %rdi, %rcx # sched: [1:0.33] +; GENERIC-NEXT: t1mskc (%rsi), %rax # sched: [5:0.50] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -437,8 +441,8 @@ define i64 @test_x86_tbm_t1mskc_u64(i64 %a0, i64* nocapture %p1) nounwind { define i32 @test_x86_tbm_tzmsk_u32(i32 %a0, i32* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_tzmsk_u32: ; GENERIC: # %bb.0: -; GENERIC-NEXT: tzmsk %edi, %ecx -; GENERIC-NEXT: tzmsk (%rsi), %eax +; GENERIC-NEXT: tzmsk %edi, %ecx # sched: [1:0.33] +; GENERIC-NEXT: tzmsk (%rsi), %eax # sched: [5:0.50] ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -462,8 +466,8 @@ define i32 @test_x86_tbm_tzmsk_u32(i32 %a0, i32* nocapture %p1) nounwind { define i64 @test_x86_tbm_tzmsk_u64(i64 %a0, i64* nocapture %p1) nounwind { ; GENERIC-LABEL: test_x86_tbm_tzmsk_u64: ; GENERIC: # %bb.0: -; GENERIC-NEXT: tzmsk %rdi, %rcx -; GENERIC-NEXT: tzmsk (%rsi), %rax +; GENERIC-NEXT: tzmsk %rdi, %rcx # sched: [1:0.33] +; GENERIC-NEXT: tzmsk (%rsi), %rax # sched: [5:0.50] ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; -- 2.11.0