From e9ce43e97a19090ae8975ef168b95ba3d29be991 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Thu, 4 Feb 2021 17:39:15 +0100 Subject: [PATCH] cpu: Move debug_excp_handler to tcg_ops MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Eduardo Habkost Signed-off-by: Claudio Fontana Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20210204163931.7358-8-cfontana@suse.de> Signed-off-by: Richard Henderson --- accel/tcg/cpu-exec.c | 4 ++-- include/hw/core/cpu.h | 4 ++-- target/arm/cpu.c | 2 +- target/i386/tcg/tcg-cpu.c | 2 +- target/lm32/cpu.c | 2 +- target/s390x/cpu.c | 2 +- target/xtensa/cpu.c | 2 +- 7 files changed, 9 insertions(+), 9 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 953f050698..e7e54fd75d 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -512,8 +512,8 @@ static inline void cpu_handle_debug_exception(CPUState *cpu) } } - if (cc->debug_excp_handler) { - cc->debug_excp_handler(cpu); + if (cc->tcg_ops.debug_excp_handler) { + cc->tcg_ops.debug_excp_handler(cpu); } } diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 94236b68d7..ff82eae939 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -117,6 +117,8 @@ typedef struct TcgCpuOperations { bool (*tlb_fill)(CPUState *cpu, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr); + /** @debug_excp_handler: Callback for handling debug exceptions */ + void (*debug_excp_handler)(CPUState *cpu); } TcgCpuOperations; @@ -161,7 +163,6 @@ typedef struct TcgCpuOperations { * @gdb_write_register: Callback for letting GDB write a register. * @debug_check_watchpoint: Callback: return true if the architectural * watchpoint whose address has matched should really fire. - * @debug_excp_handler: Callback for handling debug exceptions. * @write_elf64_note: Callback for writing a CPU-specific ELF note to a * 64-bit VM coredump. * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF @@ -224,7 +225,6 @@ struct CPUClass { int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg); int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp); - void (*debug_excp_handler)(CPUState *cpu); int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu, int cpuid, void *opaque); diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 27a16c1950..66ac210b0c 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2280,7 +2280,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) cc->tcg_ops.cpu_exec_interrupt = arm_cpu_exec_interrupt; cc->tcg_ops.synchronize_from_tb = arm_cpu_synchronize_from_tb; cc->tcg_ops.tlb_fill = arm_cpu_tlb_fill; - cc->debug_excp_handler = arm_debug_excp_handler; + cc->tcg_ops.debug_excp_handler = arm_debug_excp_handler; cc->debug_check_watchpoint = arm_debug_check_watchpoint; cc->do_unaligned_access = arm_cpu_do_unaligned_access; #if !defined(CONFIG_USER_ONLY) diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index 85b69224a9..6c1ebbdcc6 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -67,6 +67,6 @@ void tcg_cpu_common_class_init(CPUClass *cc) cc->tcg_ops.initialize = tcg_x86_init; cc->tcg_ops.tlb_fill = x86_cpu_tlb_fill; #ifndef CONFIG_USER_ONLY - cc->debug_excp_handler = breakpoint_handler; + cc->tcg_ops.debug_excp_handler = breakpoint_handler; #endif } diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c index 76dc728858..bbe1405e32 100644 --- a/target/lm32/cpu.c +++ b/target/lm32/cpu.c @@ -235,7 +235,7 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data) #endif cc->gdb_num_core_regs = 32 + 7; cc->gdb_stop_before_watchpoint = true; - cc->debug_excp_handler = lm32_debug_excp_handler; + cc->tcg_ops.debug_excp_handler = lm32_debug_excp_handler; cc->disas_set_info = lm32_cpu_disas_set_info; cc->tcg_ops.initialize = lm32_translate_init; } diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index ceee62ddca..8ade66178e 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -509,7 +509,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) cc->write_elf64_note = s390_cpu_write_elf64_note; #ifdef CONFIG_TCG cc->tcg_ops.cpu_exec_interrupt = s390_cpu_exec_interrupt; - cc->debug_excp_handler = s390x_cpu_debug_excp_handler; + cc->tcg_ops.debug_excp_handler = s390x_cpu_debug_excp_handler; cc->do_unaligned_access = s390x_cpu_do_unaligned_access; #endif #endif diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index e764dbeb73..b6f13ceb32 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -207,7 +207,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data) cc->get_phys_page_debug = xtensa_cpu_get_phys_page_debug; cc->do_transaction_failed = xtensa_cpu_do_transaction_failed; #endif - cc->debug_excp_handler = xtensa_breakpoint_handler; + cc->tcg_ops.debug_excp_handler = xtensa_breakpoint_handler; cc->disas_set_info = xtensa_cpu_disas_set_info; cc->tcg_ops.initialize = xtensa_translate_init; dc->vmsd = &vmstate_xtensa_cpu; -- 2.11.0