From ed8dcc872b954d9418f8a2438a3b187bea2cf270 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Fri, 21 Oct 2016 16:07:51 +0000 Subject: [PATCH] [X86] Use DAG::getBuildVector helper wrapper where possible. NFCI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284835 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 7cdbb6d8a83..565decb601b 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -4463,8 +4463,8 @@ static SDValue extractSubVector(SDValue Vec, unsigned IdxVal, SelectionDAG &DAG, // If the input is a buildvector just emit a smaller one. if (Vec.getOpcode() == ISD::BUILD_VECTOR) - return DAG.getNode(ISD::BUILD_VECTOR, - dl, ResultVT, makeArrayRef(Vec->op_begin() + IdxVal, ElemsPerChunk)); + return DAG.getNode(ISD::BUILD_VECTOR, dl, ResultVT, + makeArrayRef(Vec->op_begin() + IdxVal, ElemsPerChunk)); SDValue VecIdx = DAG.getIntPtrConstant(IdxVal, dl); return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec, VecIdx); @@ -19419,7 +19419,7 @@ static SDValue LowerVectorCTLZInRegLUT(SDValue Op, const SDLoc &DL, SmallVector LUTVec; for (int i = 0; i < NumBytes; ++i) LUTVec.push_back(DAG.getConstant(LUT[i % 16], DL, MVT::i8)); - SDValue InRegLUT = DAG.getNode(ISD::BUILD_VECTOR, DL, CurrVT, LUTVec); + SDValue InRegLUT = DAG.getBuildVector(CurrVT, DL, LUTVec); // Begin by bitcasting the input to byte vector, then split those bytes // into lo/hi nibbles and use the PSHUFB LUT to perform CLTZ on each of them. @@ -31779,7 +31779,7 @@ static SDValue combineVZext(SDNode *N, SelectionDAG &DAG, Cst = Cst.zextOrTrunc(SVT.getSizeInBits()); Vals.push_back(DAG.getConstant(Cst, DL, SVT)); } - return DAG.getNode(ISD::BUILD_VECTOR, DL, VT, Vals); + return DAG.getBuildVector(VT, DL, Vals); } // (vzext (bitcast (vzext (x)) -> (vzext x) -- 2.11.0