From efdc8bf1894790a85c118881395a998cbae34c1a Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Fri, 6 Jan 2012 14:49:02 -0800 Subject: [PATCH] i965: Don't calculate masks of used FS inputs This previously enabled some optimizations in the fragment shader (interpolation, etc.) if some input components were always 0.0 or 1.0. However, this data was generated by analyzing Mesa IR. The next patch in this series removes generation of Mesa IR for GLSL paths. When we detect that case, just set the used mask to ~0 and circumvent the optimizations. Signed-off-by: Ian Romanick Reviewed-by: Eric Anholt Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_vs_constval.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_vs_constval.c b/src/mesa/drivers/dri/i965/brw_vs_constval.c index 9ce5ab379ea..5b26c7a6db4 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_constval.c +++ b/src/mesa/drivers/dri/i965/brw_vs_constval.c @@ -195,6 +195,21 @@ static void calc_wm_input_sizes( struct brw_context *brw ) GLuint insn; GLuint i; + /* Mesa IR is not generated for GLSL vertex shaders. If there's no Mesa + * IR, the code below cannot determine which output components are + * written. So, skip it and assume everything is written. This + * circumvents some optimizations in the fragment shader, but it guarantees + * that correct code is generated. + */ + if (vp->program.Base.NumInstructions == 0) { + brw->wm.input_size_masks[0] = ~0; + brw->wm.input_size_masks[1] = ~0; + brw->wm.input_size_masks[2] = ~0; + brw->wm.input_size_masks[3] = ~0; + return; + } + + memset(&t, 0, sizeof(t)); /* _NEW_LIGHT | _NEW_PROGRAM */ -- 2.11.0