From f1ff6965e7ae5b5312ebba280570545f05409244 Mon Sep 17 00:00:00 2001 From: Paulo Zanoni Date: Thu, 19 Dec 2013 19:12:30 -0200 Subject: [PATCH] drm/i915: don't wait for vblank after enabling pipe on HSW Because on Haswell, the pipe is never running at this point, so we hit the 50ms timeout waiting for nothing. We already have two other places where we wait for vblanks on haswell_crtc_enable, so we're safe. This gets us rid of one instance of "vblank wait timed out" for each mode set, which means driver init and resume are also 50ms faster. Signed-off-by: Paulo Zanoni Reviewed-by: Jesse Barnes Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c456768282da..0523419bc485 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3747,7 +3747,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) intel_update_watermarks(crtc); intel_enable_pipe(dev_priv, pipe, - intel_crtc->config.has_pch_encoder, false, true); + intel_crtc->config.has_pch_encoder, false, false); if (intel_crtc->config.has_pch_encoder) lpt_pch_enable(crtc); -- 2.11.0