From f314160e32463f740114b02e807a9520d531c675 Mon Sep 17 00:00:00 2001 From: Rafael Espindola Date: Thu, 18 Jun 2015 13:39:07 +0000 Subject: [PATCH] Convert a few tests to use llvm-mc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240017 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/MC/ARM/elf-reloc-01.ll | 67 --------------------------- test/MC/ARM/elf-reloc-01.s | 26 +++++++++++ test/MC/ARM/elf-reloc-02.ll | 48 ------------------- test/MC/ARM/elf-reloc-02.s | 27 +++++++++++ test/MC/ARM/elf-reloc-03.ll | 95 -------------------------------------- test/MC/ARM/elf-reloc-03.s | 27 +++++++++++ test/MC/ARM/elf-thumbfunc-reloc.ll | 45 ------------------ test/MC/ARM/elf-thumbfunc-reloc2.s | 44 ++++++++++++++++++ 8 files changed, 124 insertions(+), 255 deletions(-) delete mode 100644 test/MC/ARM/elf-reloc-01.ll create mode 100644 test/MC/ARM/elf-reloc-01.s delete mode 100644 test/MC/ARM/elf-reloc-02.ll create mode 100644 test/MC/ARM/elf-reloc-02.s delete mode 100644 test/MC/ARM/elf-reloc-03.ll create mode 100644 test/MC/ARM/elf-reloc-03.s delete mode 100644 test/MC/ARM/elf-thumbfunc-reloc.ll create mode 100644 test/MC/ARM/elf-thumbfunc-reloc2.s diff --git a/test/MC/ARM/elf-reloc-01.ll b/test/MC/ARM/elf-reloc-01.ll deleted file mode 100644 index 7f3cc185af1..00000000000 --- a/test/MC/ARM/elf-reloc-01.ll +++ /dev/null @@ -1,67 +0,0 @@ -;; RUN: llc -mtriple=armv7-linux-gnueabi -O3 \ -;; RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 -arm-reserve-r9 \ -;; RUN: -filetype=obj %s -o - | \ -;; RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s - -;; FIXME: This file needs to be in .s form! -;; The args to llc are there to constrain the codegen only. -;; -;; Ensure no regression on ARM/gcc compatibility for -;; emitting explicit symbol relocs for nonexternal symbols -;; versus section symbol relocs (with offset) - -;; -;; Default llvm behavior is to emit as section symbol relocs nearly -;; everything that is not an undefined external. Unfortunately, this -;; diverges from what codesourcery ARM/gcc does! -;; -;; Tests that reloc to _MergedGlobals show up as explicit symbol reloc - - -target triple = "armv7-none-linux-gnueabi" - -@var_tls = thread_local global i32 1 -@var_tls_double = thread_local global double 1.000000e+00 -@var_static = internal global i32 1 -@var_static_double = internal global double 1.000000e+00 -@var_global = global i32 1 -@var_global_double = global double 1.000000e+00 - -declare i32 @mystrlen(i8* nocapture %s) nounwind - -declare void @myhextochar(i32 %n, i8* nocapture %buffer) - -declare void @__aeabi_read_tp() nounwind - -declare void @__nacl_read_tp() nounwind - -define i32 @main(i32 %argc, i8** nocapture %argv) nounwind { -entry: - switch i32 %argc, label %bb3 [ - i32 555, label %bb - i32 6666, label %bb2 - ] - -bb: ; preds = %entry - store volatile i32 11, i32* @var_tls, align 4 - store volatile double 2.200000e+01, double* @var_tls_double, align 8 - store volatile i32 33, i32* @var_static, align 4 - store volatile double 4.400000e+01, double* @var_static_double, align 8 - store volatile i32 55, i32* @var_global, align 4 - store volatile double 6.600000e+01, double* @var_global_double, align 8 - br label %bb3 - -bb2: ; preds = %entry - ret i32 add (i32 add (i32 add (i32 ptrtoint (i32* @var_tls to i32), i32 add (i32 ptrtoint (i32* @var_static to i32), i32 ptrtoint (i32* @var_global to i32))), i32 ptrtoint (double* @var_tls_double to i32)), i32 add (i32 ptrtoint (double* @var_static_double to i32), i32 ptrtoint (double* @var_global_double to i32))) - -bb3: ; preds = %bb, %entry - tail call void @exit(i32 55) noreturn nounwind - unreachable -} - -declare void @exit(i32) noreturn nounwind - -; OBJ: Relocations [ -; OBJ: Section {{.*}} .rel.text { -; OBJ: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC _MergedGlobals -; OBJ: } -; OBJ: ] diff --git a/test/MC/ARM/elf-reloc-01.s b/test/MC/ARM/elf-reloc-01.s new file mode 100644 index 00000000000..f3019cdff3c --- /dev/null +++ b/test/MC/ARM/elf-reloc-01.s @@ -0,0 +1,26 @@ +// RUN: llvm-mc -triple=armv7-linux-gnueabi \ +// RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 \ +// RUN: -filetype=obj %s -o - | \ +// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s + +// Ensure no regression on ARM/gcc compatibility for +// emitting explicit symbol relocs for nonexternal symbols +// versus section symbol relocs (with offset) - +// +// Default llvm behavior is to emit as section symbol relocs nearly +// everything that is not an undefined external. Unfortunately, this +// diverges from what codesourcery ARM/gcc does! +// +// Tests that reloc to _MergedGlobals show up as explicit symbol reloc + + movw r2, :lower16:_MergedGlobals + +_MergedGlobals: + .long 1 + + +// OBJ: Relocations [ +// OBJ: Section {{.*}} .rel.text { +// OBJ: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC _MergedGlobals +// OBJ: } +// OBJ: ] diff --git a/test/MC/ARM/elf-reloc-02.ll b/test/MC/ARM/elf-reloc-02.ll deleted file mode 100644 index 0ffb6237d61..00000000000 --- a/test/MC/ARM/elf-reloc-02.ll +++ /dev/null @@ -1,48 +0,0 @@ -;; RUN: llc -mtriple=armv7-linux-gnueabi -O3 \ -;; RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 -arm-reserve-r9 \ -;; RUN: -filetype=obj %s -o - | \ -;; RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s - -;; FIXME: This file needs to be in .s form! -;; The args to llc are there to constrain the codegen only. -;; -;; Ensure no regression on ARM/gcc compatibility for -;; emitting explicit symbol relocs for nonexternal symbols -;; versus section symbol relocs (with offset) - -;; -;; Default llvm behavior is to emit as section symbol relocs nearly -;; everything that is not an undefined external. Unfortunately, this -;; diverges from what codesourcery ARM/gcc does! -;; -;; Tests that reloc to .L.str* show up as explicit symbols - -target triple = "armv7-none-linux-gnueabi" - -@.str = private constant [7 x i8] c"@null\0A\00", align 4 -@.str1 = private constant [8 x i8] c"@write\0A\00", align 4 -@.str2 = private constant [13 x i8] c"hello worldn\00", align 4 -@.str3 = private constant [7 x i8] c"@exit\0A\00", align 4 - -declare i32 @mystrlen(i8* nocapture %s) nounwind readonly - -declare void @myhextochar(i32 %n, i8* nocapture %buffer) nounwind - -define i32 @main() nounwind { -entry: - %0 = tail call i32 (...) @write(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i32 0, i32 0), i32 6) nounwind - %1 = tail call i32 (...) @write(i32 1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str1, i32 0, i32 0), i32 7) nounwind - %2 = tail call i32 (...) @write(i32 1, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str2, i32 0, i32 0), i32 12) nounwind - %3 = tail call i32 (...) @write(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str3, i32 0, i32 0), i32 6) nounwind - tail call void @exit(i32 55) noreturn nounwind - unreachable -} - -declare i32 @write(...) - -declare void @exit(i32) noreturn nounwind - -;; OBJ: Relocations [ -;; OBJ: Section {{.*}} .rel.text { -;; OBJ-NEXT: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC .L.str -;; OBJ: } -;; OBJ: ] diff --git a/test/MC/ARM/elf-reloc-02.s b/test/MC/ARM/elf-reloc-02.s new file mode 100644 index 00000000000..24e2bb3b6fd --- /dev/null +++ b/test/MC/ARM/elf-reloc-02.s @@ -0,0 +1,27 @@ +// RUN: llvm-mc -triple=armv7-linux-gnueabi \ +// RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 \ +// RUN: -filetype=obj %s -o - | \ +// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s + +// Ensure no regression on ARM/gcc compatibility for +// emitting explicit symbol relocs for nonexternal symbols +// versus section symbol relocs (with offset) - +// +// Default llvm behavior is to emit as section symbol relocs nearly +// everything that is not an undefined external. Unfortunately, this +// diverges from what codesourcery ARM/gcc does! +// +// Tests that reloc to .L.str* show up as explicit symbols + + movw r1, :lower16:.L.str + movt r1, :upper16:.L.str + + .section .rodata,"a",%progbits +.L.str: + .asciz "@null\n" + +// OBJ: Relocations [ +// OBJ: Section {{.*}} .rel.text { +// OBJ-NEXT: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC .L.str +// OBJ: } +// OBJ: ] diff --git a/test/MC/ARM/elf-reloc-03.ll b/test/MC/ARM/elf-reloc-03.ll deleted file mode 100644 index 4beb91f193f..00000000000 --- a/test/MC/ARM/elf-reloc-03.ll +++ /dev/null @@ -1,95 +0,0 @@ -;; RUN: llc -mtriple=armv7-linux-gnueabi -O3 \ -;; RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 -arm-reserve-r9 \ -;; RUN: -filetype=obj %s -o - | \ -;; RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s - -;; FIXME: This file needs to be in .s form! -;; The args to llc are there to constrain the codegen only. -;; -;; Ensure no regression on ARM/gcc compatibility for -;; emitting explicit symbol relocs for nonexternal symbols -;; versus section symbol relocs (with offset) - -;; -;; Default llvm behavior is to emit as section symbol relocs nearly -;; everything that is not an undefined external. Unfortunately, this -;; diverges from what codesourcery ARM/gcc does! -;; -;; Verifies that internal constants appear as explict symbol relocs - - -target triple = "armv7-none-linux-gnueabi" - -@startval = global i32 5 -@vtable = internal constant [10 x i32 (...)*] [i32 (...)* bitcast (i32 ()* @foo0 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo1 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo2 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo3 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo4 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo5 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo6 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo7 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo8 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo9 to i32 (...)*)] - -declare i32 @mystrlen(i8* nocapture %s) nounwind readonly - -declare void @myhextochar(i32 %n, i8* nocapture %buffer) nounwind - -define internal i32 @foo0() nounwind readnone { -entry: - ret i32 0 -} - -define internal i32 @foo1() nounwind readnone { -entry: - ret i32 1 -} - -define internal i32 @foo2() nounwind readnone { -entry: - ret i32 2 -} - -define internal i32 @foo3() nounwind readnone { -entry: - ret i32 3 -} - -define internal i32 @foo4() nounwind readnone { -entry: - ret i32 4 -} - -define internal i32 @foo5() nounwind readnone { -entry: - ret i32 55 -} - -define internal i32 @foo6() nounwind readnone { -entry: - ret i32 6 -} - -define internal i32 @foo7() nounwind readnone { -entry: - ret i32 7 -} - -define internal i32 @foo8() nounwind readnone { -entry: - ret i32 8 -} - -define internal i32 @foo9() nounwind readnone { -entry: - ret i32 9 -} - -define i32 @main() nounwind { -entry: - %0 = load i32, i32* @startval, align 4 - %1 = getelementptr inbounds [10 x i32 (...)*], [10 x i32 (...)*]* @vtable, i32 0, i32 %0 - %2 = load i32 (...)*, i32 (...)** %1, align 4 - %3 = tail call i32 (...) %2() nounwind - tail call void @exit(i32 %3) noreturn nounwind - unreachable -} - -declare void @exit(i32) noreturn nounwind - -;; OBJ: Relocations [ -;; OBJ: Section {{.*}} .rel.text { -;; OBJ: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC vtable -;; OBJ: } -;; OBJ: ] diff --git a/test/MC/ARM/elf-reloc-03.s b/test/MC/ARM/elf-reloc-03.s new file mode 100644 index 00000000000..e55b1273769 --- /dev/null +++ b/test/MC/ARM/elf-reloc-03.s @@ -0,0 +1,27 @@ +// RUN: llvm-mc -triple=armv7-linux-gnueabi \ +// RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 \ +// RUN: -filetype=obj %s -o - | \ +// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s + +// Ensure no regression on ARM/gcc compatibility for +// emitting explicit symbol relocs for nonexternal symbols +// versus section symbol relocs (with offset) - +// +// Default llvm behavior is to emit as section symbol relocs nearly +// everything that is not an undefined external. Unfortunately, this +// diverges from what codesourcery ARM/gcc does! +// +// Verifies that internal constants appear as explict symbol relocs + + movw r1, :lower16:vtable + + + .section .data.rel.ro.local,"aw",%progbits +vtable: + .long 0 + +// OBJ: Relocations [ +// OBJ: Section {{.*}} .rel.text { +// OBJ: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC vtable +// OBJ: } +// OBJ: ] diff --git a/test/MC/ARM/elf-thumbfunc-reloc.ll b/test/MC/ARM/elf-thumbfunc-reloc.ll deleted file mode 100644 index 52579581875..00000000000 --- a/test/MC/ARM/elf-thumbfunc-reloc.ll +++ /dev/null @@ -1,45 +0,0 @@ -; RUN: llc %s -mtriple=thumbv7-linux-gnueabi -relocation-model=pic \ -; RUN: -filetype=obj -o - | llvm-readobj -s -sd -r -t | \ -; RUN: FileCheck %s - -; FIXME: This file needs to be in .s form! -; We want to test relocatable thumb function call, -; but ARMAsmParser cannot handle "bl foo(PLT)" yet - -target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:32-n32" -target triple = "thumbv7-none--gnueabi" - -define void @foo() nounwind { -entry: - ret void -} - -define void @bar() nounwind { -entry: - call void @foo() - ret void -} - - -; make sure that bl 0 (fff7feff) is correctly encoded -; CHECK: Sections [ -; CHECK: SectionData ( -; CHECK: 0000: 704780B5 FFF7FEFF 80BD -; CHECK: ) -; CHECK: ] - -; CHECK: Relocations [ -; CHECK-NEXT: Section {{.*}} .rel.text { -; CHECK-NEXT: 0x4 R_ARM_THM_CALL foo 0x0 -; CHECK-NEXT: } -; CHECK-NEXT: Section {{.*}} .rel.ARM.exidx { -; CHECK-NEXT: 0x0 R_ARM_PREL31 .text 0x0 -; CHECK-NEXT: 0x8 R_ARM_PREL31 .text 0x0 -; CHECK-NEXT: } -; CHECK-NEXT: ] - -; make sure foo is thumb function: bit 0 = 1 -; CHECK: Symbols [ -; CHECK: Symbol { -; CHECK: Name: foo -; CHECK-NEXT: Value: 0x1 diff --git a/test/MC/ARM/elf-thumbfunc-reloc2.s b/test/MC/ARM/elf-thumbfunc-reloc2.s new file mode 100644 index 00000000000..54eedcd9575 --- /dev/null +++ b/test/MC/ARM/elf-thumbfunc-reloc2.s @@ -0,0 +1,44 @@ +// RUN: llvm-mc %s -triple=thumbv7-linux-gnueabi -relocation-model=pic \ +// RUN: -filetype=obj -o - | llvm-readobj -s -sd -r -t | \ +// RUN: FileCheck %s + +// We want to test relocatable thumb function call. + + .thumb_func +foo: + .fnstart + bx lr + .cantunwind + .fnend + + .align 1 +bar: + .fnstart + push {r7, lr} + bl foo(PLT) + pop {r7, pc} + .cantunwind + .fnend + +// make sure that bl 0 (fff7feff) is correctly encoded +// CHECK: Sections [ +// CHECK: SectionData ( +// CHECK: 0000: 704780B5 FFF7FEFF 80BD +// CHECK: ) +// CHECK: ] + +// CHECK: Relocations [ +// CHECK-NEXT: Section {{.*}} .rel.text { +// CHECK-NEXT: 0x4 R_ARM_THM_CALL foo 0x0 +// CHECK-NEXT: } +// CHECK-NEXT: Section {{.*}} .rel.ARM.exidx { +// CHECK-NEXT: 0x0 R_ARM_PREL31 .text 0x0 +// CHECK-NEXT: 0x8 R_ARM_PREL31 .text 0x0 +// CHECK-NEXT: } +// CHECK-NEXT: ] + +// make sure foo is thumb function: bit 0 = 1 +// CHECK: Symbols [ +// CHECK: Symbol { +// CHECK: Name: foo +// CHECK-NEXT: Value: 0x1 -- 2.11.0