From f36c071f6344e0a335ed4b4e0b3a38c0dd54648b Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Mon, 3 Dec 2018 11:36:56 +0000 Subject: [PATCH] drm/i915/ringbuffer: Clear semaphore sync registers on ring init Ensure that the sync registers are cleared every time we restart the ring to avoid stale values from creeping in from random neutrinos. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108888 Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala Link: https://patchwork.freedesktop.org/patch/msgid/20181203113701.12106-3-chris@chris-wilson.co.uk --- drivers/gpu/drm/i915/intel_ringbuffer.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 28ae1e436ea6..d81eaf5f6b3e 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -529,6 +529,13 @@ static int init_ring_common(struct intel_engine_cs *engine) intel_engine_reset_breadcrumbs(engine); + if (HAS_LEGACY_SEMAPHORES(engine->i915)) { + I915_WRITE(RING_SYNC_0(engine->mmio_base), 0); + I915_WRITE(RING_SYNC_1(engine->mmio_base), 0); + if (HAS_VEBOX(dev_priv)) + I915_WRITE(RING_SYNC_2(engine->mmio_base), 0); + } + /* Enforce ordering by reading HEAD register back */ I915_READ_HEAD(engine); -- 2.11.0