From f392ec4b1d92004949e5a4f4418b1fbb2582ef0d Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Sun, 10 Aug 2014 04:10:28 +1000 Subject: [PATCH] drm/nouveau: use ram info from nvif_device Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/dispnv04/hw.c | 9 ++++----- drivers/gpu/drm/nouveau/nouveau_abi16.c | 4 ---- drivers/gpu/drm/nouveau/nouveau_bo.c | 3 +-- drivers/gpu/drm/nouveau/nouveau_chan.c | 11 +++-------- drivers/gpu/drm/nouveau/nouveau_fbcon.c | 5 ++--- drivers/gpu/drm/nouveau/nouveau_ttm.c | 3 +-- drivers/gpu/drm/nouveau/nv50_display.c | 12 ++++++------ drivers/gpu/drm/nouveau/nvif/device.h | 2 -- 8 files changed, 17 insertions(+), 32 deletions(-) diff --git a/drivers/gpu/drm/nouveau/dispnv04/hw.c b/drivers/gpu/drm/nouveau/dispnv04/hw.c index c9dc5541acbf..3d4c19300768 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/hw.c +++ b/drivers/gpu/drm/nouveau/dispnv04/hw.c @@ -662,7 +662,6 @@ nv_load_state_ext(struct drm_device *dev, int head, struct nouveau_drm *drm = nouveau_drm(dev); struct nvif_device *device = &drm->device; struct nouveau_timer *ptimer = nvkm_timer(device); - struct nouveau_fb *pfb = nvkm_fb(device); struct nv04_crtc_reg *regp = &state->crtc_reg[head]; uint32_t reg900; int i; @@ -679,10 +678,10 @@ nv_load_state_ext(struct drm_device *dev, int head, nvif_wr32(device, NV_PVIDEO_INTR_EN, 0); nvif_wr32(device, NV_PVIDEO_OFFSET_BUFF(0), 0); nvif_wr32(device, NV_PVIDEO_OFFSET_BUFF(1), 0); - nvif_wr32(device, NV_PVIDEO_LIMIT(0), pfb->ram->size - 1); - nvif_wr32(device, NV_PVIDEO_LIMIT(1), pfb->ram->size - 1); - nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(0), pfb->ram->size - 1); - nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(1), pfb->ram->size - 1); + nvif_wr32(device, NV_PVIDEO_LIMIT(0), device->info.ram_size - 1); + nvif_wr32(device, NV_PVIDEO_LIMIT(1), device->info.ram_size - 1); + nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(0), device->info.ram_size - 1); + nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(1), device->info.ram_size - 1); nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0); NVWriteCRTC(dev, head, NV_PCRTC_CURSOR_CONFIG, regp->cursor_cfg); diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c b/drivers/gpu/drm/nouveau/nouveau_abi16.c index 43dfc3e83409..615714c1727d 100644 --- a/drivers/gpu/drm/nouveau/nouveau_abi16.c +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c @@ -240,8 +240,6 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS) struct nouveau_abi16 *abi16 = nouveau_abi16_get(file_priv, dev); struct nouveau_abi16_chan *chan; struct nvif_device *device; - struct nouveau_instmem *imem; - struct nouveau_fb *pfb; int ret; if (unlikely(!abi16)) @@ -251,8 +249,6 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS) return nouveau_abi16_put(abi16, -ENODEV); device = &abi16->device; - imem = nvkm_instmem(device); - pfb = nvkm_fb(device); /* hack to allow channel engine type specification on kepler */ if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index 42b3ca881364..da5d631aa5b9 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -257,8 +257,7 @@ static void set_placement_range(struct nouveau_bo *nvbo, uint32_t type) { struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev); - struct nouveau_fb *pfb = nvkm_fb(&drm->device); - u32 vram_pages = pfb->ram->size >> PAGE_SHIFT; + u32 vram_pages = drm->device.info.ram_size >> PAGE_SHIFT; if (drm->device.info.family == NV_DEVICE_INFO_V0_CELSIUS && nvbo->tile_mode && (type & TTM_PL_FLAG_VRAM) && diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c index b4173be38451..99cd9e4a2aa6 100644 --- a/drivers/gpu/drm/nouveau/nouveau_chan.c +++ b/drivers/gpu/drm/nouveau/nouveau_chan.c @@ -88,9 +88,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, u32 handle, u32 size, struct nouveau_channel **pchan) { struct nouveau_cli *cli = (void *)nvif_client(&device->base); - struct nouveau_instmem *imem = nvkm_instmem(device); struct nouveau_vmmgr *vmm = nvkm_vmmgr(device); - struct nouveau_fb *pfb = nvkm_fb(device); struct nv_dma_v0 args = {}; struct nouveau_channel *chan; u32 target; @@ -141,7 +139,6 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, args.limit = cli->vm->vmm->limit - 1; } else if (chan->push.buffer->bo.mem.mem_type == TTM_PL_VRAM) { - u64 limit = pfb->ram->size - imem->reserved - 1; if (device->info.family == NV_DEVICE_INFO_V0_TNT) { /* nv04 vram pushbuf hack, retarget to its location in * the framebuffer bar rather than direct vram access.. @@ -150,12 +147,12 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, args.target = NV_DMA_V0_TARGET_PCI; args.access = NV_DMA_V0_ACCESS_RDWR; args.start = nv_device_resource_start(nvkm_device(device), 1); - args.limit = args.start + limit; + args.limit = args.start + device->info.ram_user - 1; } else { args.target = NV_DMA_V0_TARGET_VRAM; args.access = NV_DMA_V0_ACCESS_RDWR; args.start = 0; - args.limit = limit; + args.limit = device->info.ram_user - 1; } } else { if (chan->drm->agp.stat == ENABLED) { @@ -284,9 +281,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) { struct nvif_device *device = chan->device; struct nouveau_cli *cli = (void *)nvif_client(&device->base); - struct nouveau_instmem *imem = nvkm_instmem(device); struct nouveau_vmmgr *vmm = nvkm_vmmgr(device); - struct nouveau_fb *pfb = nvkm_fb(device); struct nouveau_software_chan *swch; struct nv_dma_v0 args = {}; int ret, i; @@ -304,7 +299,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) args.target = NV_DMA_V0_TARGET_VRAM; args.access = NV_DMA_V0_ACCESS_RDWR; args.start = 0; - args.limit = pfb->ram->size - imem->reserved - 1; + args.limit = device->info.ram_user - 1; } ret = nvif_object_init(chan->object, NULL, vram, diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c index 2f22da0e1ec4..ebfe3180109e 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c +++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c @@ -491,7 +491,6 @@ int nouveau_fbcon_init(struct drm_device *dev) { struct nouveau_drm *drm = nouveau_drm(dev); - struct nouveau_fb *pfb = nvkm_fb(&drm->device); struct nouveau_fbdev *fbcon; int preferred_bpp; int ret; @@ -518,10 +517,10 @@ nouveau_fbcon_init(struct drm_device *dev) drm_fb_helper_single_add_all_connectors(&fbcon->helper); - if (pfb->ram->size <= 32 * 1024 * 1024) + if (drm->device.info.ram_size <= 32 * 1024 * 1024) preferred_bpp = 8; else - if (pfb->ram->size <= 64 * 1024 * 1024) + if (drm->device.info.ram_size <= 64 * 1024 * 1024) preferred_bpp = 16; else preferred_bpp = 32; diff --git a/drivers/gpu/drm/nouveau/nouveau_ttm.c b/drivers/gpu/drm/nouveau/nouveau_ttm.c index 244c58ee45a6..53874b76b031 100644 --- a/drivers/gpu/drm/nouveau/nouveau_ttm.c +++ b/drivers/gpu/drm/nouveau/nouveau_ttm.c @@ -389,8 +389,7 @@ nouveau_ttm_init(struct nouveau_drm *drm) } /* VRAM init */ - drm->gem.vram_available = nvkm_fb(&drm->device)->ram->size; - drm->gem.vram_available -= nvkm_instmem(&drm->device)->reserved; + drm->gem.vram_available = drm->device.info.ram_user; ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_VRAM, drm->gem.vram_available >> PAGE_SHIFT); diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index 9e9fa585b304..03949eaa629f 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c @@ -195,19 +195,19 @@ nv50_dmac_create(struct nvif_object *disp, const u32 *oclass, u8 head, void *data, u32 size, u64 syncbuf, struct nv50_dmac *dmac) { - struct nouveau_fb *pfb = nvkm_fb(nvif_device(disp)); + struct nvif_device *device = nvif_device(disp); struct nv50_disp_core_channel_dma_v0 *args = data; struct nvif_object pushbuf; int ret; mutex_init(&dmac->lock); - dmac->ptr = pci_alloc_consistent(nvkm_device(nvif_device(disp))->pdev, + dmac->ptr = pci_alloc_consistent(nvkm_device(device)->pdev, PAGE_SIZE, &dmac->handle); if (!dmac->ptr) return -ENOMEM; - ret = nvif_object_init(nvif_object(nvif_device(disp)), NULL, + ret = nvif_object_init(nvif_object(device), NULL, args->pushbuf, NV_DMA_FROM_MEMORY, &(struct nv_dma_v0) { .target = NV_DMA_V0_TARGET_PCI_US, @@ -241,7 +241,7 @@ nv50_dmac_create(struct nvif_object *disp, const u32 *oclass, u8 head, .target = NV_DMA_V0_TARGET_VRAM, .access = NV_DMA_V0_ACCESS_RDWR, .start = 0, - .limit = pfb->ram->size - 1, + .limit = device->info.ram_user - 1, }, sizeof(struct nv_dma_v0), &dmac->vram); if (ret) @@ -2339,7 +2339,6 @@ nv50_fb_ctor(struct drm_framebuffer *fb) struct nouveau_drm *drm = nouveau_drm(fb->dev); struct nouveau_bo *nvbo = nv_fb->nvbo; struct nv50_disp *disp = nv50_disp(fb->dev); - struct nouveau_fb *pfb = nvkm_fb(&drm->device); u8 kind = nouveau_bo_tile_layout(nvbo) >> 8; u8 tile = nvbo->tile_mode; @@ -2377,7 +2376,8 @@ nv50_fb_ctor(struct drm_framebuffer *fb) } nv_fb->r_handle = 0xffff0000 | kind; - return nv50_fbdma_init(fb->dev, nv_fb->r_handle, 0, pfb->ram->size, kind); + return nv50_fbdma_init(fb->dev, nv_fb->r_handle, 0, + drm->device.info.ram_user, kind); } /****************************************************************************** diff --git a/drivers/gpu/drm/nouveau/nvif/device.h b/drivers/gpu/drm/nouveau/nvif/device.h index b3928765f659..43180f9fe630 100644 --- a/drivers/gpu/drm/nouveau/nvif/device.h +++ b/drivers/gpu/drm/nouveau/nvif/device.h @@ -29,7 +29,6 @@ void nvif_device_ref(struct nvif_device *, struct nvif_device **); /*XXX*/ #include #include -#include #include #include #include @@ -41,7 +40,6 @@ void nvif_device_ref(struct nvif_device *, struct nvif_device **); #define nvkm_device(a) nv_device(nvkm_object((a))) #define nvkm_bios(a) nouveau_bios(nvkm_device(a)) #define nvkm_fb(a) nouveau_fb(nvkm_device(a)) -#define nvkm_instmem(a) nouveau_instmem(nvkm_device(a)) #define nvkm_vmmgr(a) nouveau_vmmgr(nvkm_device(a)) #define nvkm_bar(a) nouveau_bar(nvkm_device(a)) #define nvkm_gpio(a) nouveau_gpio(nvkm_device(a)) -- 2.11.0