From f41e1d1a4554f705df1c8080eaab1f6884c0ed23 Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stellard@amd.com>
Date: Wed, 3 Dec 2014 18:27:08 +0000
Subject: [PATCH] R600/SI: Move SIInsertWaits into
 AMDGPUPassConfig::addPreSched2()

This pass needs to be run after PrologEpilogInserter, because
that pass may inserter spill code which reads or writes memory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223253 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/R600/AMDGPUTargetMachine.cpp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/Target/R600/AMDGPUTargetMachine.cpp b/lib/Target/R600/AMDGPUTargetMachine.cpp
index 8854e7b5093..08db0011e09 100644
--- a/lib/Target/R600/AMDGPUTargetMachine.cpp
+++ b/lib/Target/R600/AMDGPUTargetMachine.cpp
@@ -190,7 +190,6 @@ bool AMDGPUPassConfig::addPostRegAlloc() {
 
   if (ST.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) {
     addPass(createSIShrinkInstructionsPass());
-    addPass(createSIInsertWaits(*TM));
   }
   return false;
 }
@@ -204,6 +203,9 @@ bool AMDGPUPassConfig::addPreSched2() {
     addPass(&IfConverterID);
   if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS)
     addPass(createR600ClauseMergePass(*TM));
+  if (ST.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) {
+    addPass(createSIInsertWaits(*TM));
+  }
   return false;
 }
 
-- 
2.11.0