From f4b4c3d722e2f46f2a693c40321b1806b0ada232 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Tue, 23 Dec 2008 14:36:40 +0000 Subject: [PATCH] 2008-12-23 H.J. Lu PR ld/7036 * elfxx-ia64.c (elfNN_ia64_relax_section): Assume linker will always insert 32byte between the .plt and .text sections after the the first relaxation pass. --- bfd/ChangeLog | 7 +++++++ bfd/elfxx-ia64.c | 14 +++++++++++++- 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 13d495dce2..8e71db7130 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,10 @@ +2008-12-23 H.J. Lu + + PR ld/7036 + * elfxx-ia64.c (elfNN_ia64_relax_section): Assume linker will + always insert 32byte between the .plt and .text sections after + the the first relaxation pass. + 2008-12-23 Nick Clifton PR 7093 diff --git a/bfd/elfxx-ia64.c b/bfd/elfxx-ia64.c index d662c7498c..801c25b8f0 100644 --- a/bfd/elfxx-ia64.c +++ b/bfd/elfxx-ia64.c @@ -994,8 +994,20 @@ elfNN_ia64_relax_section (bfd *abfd, asection *sec, + sec->output_offset + roff) & (bfd_vma) -4; + /* The .plt section is aligned at 32byte and the .text section + is aligned at 64byte. The .text section is right after the + .plt section. After the first relaxation pass, linker may + increase the gap between the .plt and .text sections up + to 32byte. We assume linker will always insert 32byte + between the .plt and .text sections after the the first + relaxation pass. */ + if (tsec == ia64_info->plt_sec) + offset = -0x1000000 + 32; + else + offset = -0x1000000; + /* If the branch is in range, no need to do anything. */ - if ((bfd_signed_vma) (symaddr - reladdr) >= -0x1000000 + if ((bfd_signed_vma) (symaddr - reladdr) >= offset && (bfd_signed_vma) (symaddr - reladdr) <= 0x0FFFFF0) { /* If the 60-bit branch is in 21-bit range, optimize it. */ -- 2.11.0