From f665bd1515aceb80990fdbc91b7c8aed045f5da8 Mon Sep 17 00:00:00 2001 From: Bharat Kumar Gogada Date: Tue, 30 Aug 2016 16:09:17 +0530 Subject: [PATCH] PCI: xilinx-nwl: Enable all MSI interrupts using MSI mask The current mask enables and allows only one MSI interrupt on each MSI line. Enable all MSI interrupts, which will also support Endpoints with multi-MSI support. Signed-off-by: Bharat Kumar Gogada Signed-off-by: Bjorn Helgaas --- drivers/pci/host/pcie-xilinx-nwl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/host/pcie-xilinx-nwl.c b/drivers/pci/host/pcie-xilinx-nwl.c index dfdf58f20b19..07261a7f4627 100644 --- a/drivers/pci/host/pcie-xilinx-nwl.c +++ b/drivers/pci/host/pcie-xilinx-nwl.c @@ -120,8 +120,8 @@ MSGF_LEG_SR_INTC | MSGF_LEG_SR_INTD) /* MSI interrupt status mask bits */ -#define MSGF_MSI_SR_LO_MASK BIT(0) -#define MSGF_MSI_SR_HI_MASK BIT(0) +#define MSGF_MSI_SR_LO_MASK GENMASK(31, 0) +#define MSGF_MSI_SR_HI_MASK GENMASK(31, 0) #define MSII_PRESENT BIT(0) #define MSII_ENABLE BIT(0) -- 2.11.0