From f799d906ab66d40da8918620145f9c326784e7f6 Mon Sep 17 00:00:00 2001
From: Mikael Holmen <mikael.holmen@ericsson.com>
Date: Thu, 12 Oct 2017 06:21:28 +0000
Subject: [PATCH] [RegisterCoalescer] Don't set read-undef in pruneValues, only
 clear

Summary:
The comments in the code said

 // Remove <def,read-undef> flags. This def is now a partial redef.

but the code didn't just remove read-undef, it could introduce new ones which
could cause errors.

E.g. if we have something like

%vreg1<def> = IMPLICIT_DEF
%vreg2:subreg1<def, read-undef> = op %vreg3, %vreg4
%vreg2:subreg2<def> = op %vreg6, %vreg7

and we merge %vreg1 and %vreg2 then we should not set undef on the second subreg
def, which the old code did.

Now we solve this by actually do what the code comment says. We remove
read-undef flags rather than remove or introduce them.

Reviewers: qcolombet, MatzeB

Reviewed By: MatzeB

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38616

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315564 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/CodeGen/RegisterCoalescer.cpp                  |  4 +--
 .../X86/simple-register-allocation-read-undef.mir  | 30 ++++++++++++++++++++++
 2 files changed, 32 insertions(+), 2 deletions(-)
 create mode 100644 test/CodeGen/MIR/X86/simple-register-allocation-read-undef.mir

diff --git a/lib/CodeGen/RegisterCoalescer.cpp b/lib/CodeGen/RegisterCoalescer.cpp
index 30b2686d620..1ef7e41b8ae 100644
--- a/lib/CodeGen/RegisterCoalescer.cpp
+++ b/lib/CodeGen/RegisterCoalescer.cpp
@@ -2685,8 +2685,8 @@ void JoinVals::pruneValues(JoinVals &Other,
           for (MachineOperand &MO :
                Indexes->getInstructionFromIndex(Def)->operands()) {
             if (MO.isReg() && MO.isDef() && MO.getReg() == Reg) {
-              if (MO.getSubReg() != 0)
-                MO.setIsUndef(EraseImpDef);
+              if (MO.getSubReg() != 0 && MO.isUndef() && !EraseImpDef)
+                MO.setIsUndef(false);
               MO.setIsDead(false);
             }
           }
diff --git a/test/CodeGen/MIR/X86/simple-register-allocation-read-undef.mir b/test/CodeGen/MIR/X86/simple-register-allocation-read-undef.mir
new file mode 100644
index 00000000000..ff8fbe297c9
--- /dev/null
+++ b/test/CodeGen/MIR/X86/simple-register-allocation-read-undef.mir
@@ -0,0 +1,30 @@
+# RUN: llc -mtriple=x86_64-- %s -o - -run-pass=simple-register-coalescing | FileCheck %s
+---
+name: f
+body: |
+  bb.0:
+    JB_1 %bb.2, undef implicit killed %eflags
+    JMP_1 %bb.1
+
+  bb.1:
+    %0 : gr64 = IMPLICIT_DEF
+    NOOP implicit-def undef %1.sub_32bit : gr64
+    NOOP implicit-def %1.sub_16bit : gr64
+    JMP_1 %bb.3
+
+  bb.2:
+    NOOP implicit-def %0
+    %1 = COPY %0
+
+  bb.3:
+    NOOP implicit killed %0
+    NOOP implicit killed %1
+...
+
+# We should have a setting of both sub_32bit and sub_16bit. The first one
+# should be undef and not dead, and the second should not be undef.
+
+# CHECK-NOT:  dead
+# CHECK:      NOOP implicit-def undef %1.sub_32bit
+# CHECK-NOT:  undef
+# CHECK-NEXT: NOOP implicit-def %1.sub_16bit
-- 
2.11.0