From f80552b7e5f627a5dd07af017b7d65dec010ca48 Mon Sep 17 00:00:00 2001 From: Vladimir Marko Date: Thu, 7 May 2015 12:25:40 +0100 Subject: [PATCH] Quick: Abolish kMirOpCheckPart2. The tricks played with kMirOpCheckPart2 are making the native GC map generation unnecessarily complex. They have caused problems in the past and now there is bad interaction with the DCE. Rather than fixing it time and again, remove the pseudo-insn. (The whole purpose of those tricks seems to be to allow the register tracking to be used for the throwing insn before resetting the tracking for the next block. However, it's questionable whether that's better than processing the throwing insn with the subsequent instructions.) Bug: 20736048 (cherry picked from commit e299f167c9559401548eab71678d4b779e46c2fb) Change-Id: I8a60d26c5e6b6b608d68b8bb6b66d411f9a28f90 --- compiler/dex/compiler_enums.h | 1 - compiler/dex/mir_dataflow.cc | 3 --- compiler/dex/mir_graph.cc | 7 ++----- compiler/dex/quick/codegen_util.cc | 16 ---------------- compiler/dex/quick/mir_to_lir.cc | 15 --------------- compiler/dex/quick/quick_compiler.cc | 1 - 6 files changed, 2 insertions(+), 41 deletions(-) diff --git a/compiler/dex/compiler_enums.h b/compiler/dex/compiler_enums.h index 0acdd422d..b78b3d7d7 100644 --- a/compiler/dex/compiler_enums.h +++ b/compiler/dex/compiler_enums.h @@ -172,7 +172,6 @@ enum ExtendedMIROpcode { kMirOpRangeCheck, kMirOpDivZeroCheck, kMirOpCheck, - kMirOpCheckPart2, kMirOpSelect, // Vector opcodes: diff --git a/compiler/dex/mir_dataflow.cc b/compiler/dex/mir_dataflow.cc index b4aec98e0..a7ba06198 100644 --- a/compiler/dex/mir_dataflow.cc +++ b/compiler/dex/mir_dataflow.cc @@ -834,9 +834,6 @@ const uint64_t MIRGraph::oat_data_flow_attributes_[kMirOpLast] = { // 10B MIR_CHECK 0, - // 10C MIR_CHECKPART2 - 0, - // 10D MIR_SELECT DF_DA | DF_UB, diff --git a/compiler/dex/mir_graph.cc b/compiler/dex/mir_graph.cc index 9e3fbbc96..1871f0710 100644 --- a/compiler/dex/mir_graph.cc +++ b/compiler/dex/mir_graph.cc @@ -52,8 +52,7 @@ const char* MIRGraph::extended_mir_op_names_[kMirOpLast - kMirOpFirst] = { "OpNullCheck", "OpRangeCheck", "OpDivZeroCheck", - "Check1", - "Check2", + "Check", "Select", "ConstVector", "MoveVector", @@ -1508,7 +1507,7 @@ char* MIRGraph::GetDalvikDisassembly(const MIR* mir) { Instruction::Format dalvik_format = Instruction::k10x; // Default to no-operand format. // Handle special cases that recover the original dalvik instruction. - if ((opcode == kMirOpCheck) || (opcode == kMirOpCheckPart2)) { + if (opcode == kMirOpCheck) { str.append(extended_mir_op_names_[opcode - kMirOpFirst]); str.append(": "); // Recover the original Dex instruction. @@ -2517,8 +2516,6 @@ int MIR::DecodedInstruction::FlagsOf() const { return Instruction::kContinue | Instruction::kThrow; case kMirOpCheck: return Instruction::kContinue | Instruction::kThrow; - case kMirOpCheckPart2: - return Instruction::kContinue; case kMirOpSelect: return Instruction::kContinue; case kMirOpConstVector: diff --git a/compiler/dex/quick/codegen_util.cc b/compiler/dex/quick/codegen_util.cc index fb68335e6..86bb69d01 100644 --- a/compiler/dex/quick/codegen_util.cc +++ b/compiler/dex/quick/codegen_util.cc @@ -1391,22 +1391,6 @@ void Mir2Lir::InitReferenceVRegs(BasicBlock* bb, BitVector* references) { } } } - if (bb->block_type != kEntryBlock && bb->first_mir_insn != nullptr && - static_cast(bb->first_mir_insn->dalvikInsn.opcode) == kMirOpCheckPart2) { - // In Mir2Lir::MethodBlockCodeGen() we have artificially moved the throwing - // instruction to the previous block. However, the MIRGraph data used above - // doesn't reflect that, so we still need to process that MIR insn here. - MIR* mir = nullptr; - BasicBlock* pred_bb = bb; - // Traverse empty blocks. - while (mir == nullptr && pred_bb->predecessors.size() == 1u) { - pred_bb = mir_graph_->GetBasicBlock(bb->predecessors[0]); - DCHECK(pred_bb != nullptr); - mir = pred_bb->last_mir_insn; - } - DCHECK(mir != nullptr); - UpdateReferenceVRegsLocal(nullptr, mir, references); - } } bool Mir2Lir::UpdateReferenceVRegsLocal(MIR* mir, MIR* prev_mir, BitVector* references) { diff --git a/compiler/dex/quick/mir_to_lir.cc b/compiler/dex/quick/mir_to_lir.cc index e9e9161a1..e3e87ecb1 100644 --- a/compiler/dex/quick/mir_to_lir.cc +++ b/compiler/dex/quick/mir_to_lir.cc @@ -1187,7 +1187,6 @@ void Mir2Lir::HandleExtendedMethodMIR(BasicBlock* bb, MIR* mir) { case kMirOpRangeCheck: case kMirOpDivZeroCheck: case kMirOpCheck: - case kMirOpCheckPart2: // Ignore these known opcodes break; default: @@ -1276,20 +1275,6 @@ bool Mir2Lir::MethodBlockCodeGen(BasicBlock* bb) { head_lir->u.m.def_mask = &kEncodeAll; } - if (opcode == kMirOpCheck) { - // Combine check and work halves of throwing instruction. - MIR* work_half = mir->meta.throw_insn; - mir->dalvikInsn = work_half->dalvikInsn; - mir->optimization_flags = work_half->optimization_flags; - mir->meta = work_half->meta; // Whatever the work_half had, we need to copy it. - opcode = work_half->dalvikInsn.opcode; - SSARepresentation* ssa_rep = work_half->ssa_rep; - work_half->ssa_rep = mir->ssa_rep; - mir->ssa_rep = ssa_rep; - work_half->dalvikInsn.opcode = static_cast(kMirOpCheckPart2); - work_half->meta.throw_insn = mir; - } - if (MIR::DecodedInstruction::IsPseudoMirOp(opcode)) { HandleExtendedMethodMIR(bb, mir); continue; diff --git a/compiler/dex/quick/quick_compiler.cc b/compiler/dex/quick/quick_compiler.cc index 73cfe92c4..7ca438225 100644 --- a/compiler/dex/quick/quick_compiler.cc +++ b/compiler/dex/quick/quick_compiler.cc @@ -403,7 +403,6 @@ static int kAllOpcodes[] = { kMirOpRangeCheck, kMirOpDivZeroCheck, kMirOpCheck, - kMirOpCheckPart2, kMirOpSelect, }; -- 2.11.0