From f847657767a617564c6e07adcd496622f56d8b3f Mon Sep 17 00:00:00 2001 From: Quentin Colombet Date: Thu, 19 Dec 2013 18:32:04 +0000 Subject: [PATCH] [X86][fast-isel] Fix select lowering. The condition in selects is supposed to be i1. Make sure we are just reading the less significant bit of the 8 bits width value to match this constraint. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197712 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86FastISel.cpp | 9 +++++++-- test/CodeGen/X86/fast-isel-select.ll | 16 ++++++++++++++++ 2 files changed, 23 insertions(+), 2 deletions(-) create mode 100644 test/CodeGen/X86/fast-isel-select.ll diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index 972b82fa946..7be2a14a44f 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -1508,8 +1508,13 @@ bool X86FastISel::X86SelectSelect(const Instruction *I) { unsigned Op2Reg = getRegForValue(I->getOperand(2)); if (Op2Reg == 0) return false; - BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::TEST8rr)) - .addReg(Op0Reg).addReg(Op0Reg); + // Selects operate on i1, however, Op0Reg is 8 bits width and may contain + // garbage. Indeed, only the less significant bit is supposed to be accurate. + // If we read more than the lsb, we may see non-zero values whereas lsb + // is zero. Therefore, we have to truncate Op0Reg to i1 for the select. + // This is acheived by performing TEST against 1. + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::TEST8ri)) + .addReg(Op0Reg).addImm(1); unsigned ResultReg = createResultReg(RC); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), ResultReg) .addReg(Op1Reg).addReg(Op2Reg); diff --git a/test/CodeGen/X86/fast-isel-select.ll b/test/CodeGen/X86/fast-isel-select.ll new file mode 100644 index 00000000000..53158bc5396 --- /dev/null +++ b/test/CodeGen/X86/fast-isel-select.ll @@ -0,0 +1,16 @@ +; RUN: llc -mtriple x86_64-apple-darwin -O0 -o - < %s | FileCheck %s +; Make sure we only use the less significant bit of the value that feeds the +; select. Otherwise, we may account for a non-zero value whereas the +; lsb is zero. +; + +; CHECK-LABEL: fastisel_select: +; CHECK: subb {{%[a-z0-9]+}}, [[RES:%[a-z0-9]+]] +; CHECK: testb $1, [[RES]] +; CHECK: cmovel +define i32 @fastisel_select(i1 %exchSub2211_, i1 %trunc_8766) { + %shuffleInternal15257_8932 = sub i1 %exchSub2211_, %trunc_8766 + %counter_diff1345 = select i1 %shuffleInternal15257_8932, i32 1204476887, i32 0 + ret i32 %counter_diff1345 +} + -- 2.11.0