From fbeabd09236664f34ea3e4a9f7dcf5a0cdb7fc47 Mon Sep 17 00:00:00 2001 From: Kirill Marinushkin Date: Mon, 16 Apr 2018 19:56:44 +0200 Subject: [PATCH] ASoC: topology: Modify clock gating parameter parsing to switch This improves the coding style of this piece of code. Signed-off-by: Kirill Marinushkin Cc: Mark Brown Cc: Pierre-Louis Bossart Cc: Jaroslav Kysela Cc: Takashi Iwai Cc: Pan Xiuli Cc: Liam Girdwood Cc: linux-kernel@vger.kernel.org Cc: alsa-devel@alsa-project.org Signed-off-by: Mark Brown --- sound/soc/soc-topology.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/sound/soc/soc-topology.c b/sound/soc/soc-topology.c index aab31144f683..ec2ef7629dbb 100644 --- a/sound/soc/soc-topology.c +++ b/sound/soc/soc-topology.c @@ -2007,11 +2007,19 @@ static void set_link_hw_format(struct snd_soc_dai_link *link, link->dai_fmt = hw_config->fmt & SND_SOC_DAIFMT_FORMAT_MASK; /* clock gating */ - if (hw_config->clock_gated == SND_SOC_TPLG_DAI_CLK_GATE_GATED) + switch (hw_config->clock_gated) { + case SND_SOC_TPLG_DAI_CLK_GATE_GATED: link->dai_fmt |= SND_SOC_DAIFMT_GATED; - else if (hw_config->clock_gated == - SND_SOC_TPLG_DAI_CLK_GATE_CONT) + break; + + case SND_SOC_TPLG_DAI_CLK_GATE_CONT: link->dai_fmt |= SND_SOC_DAIFMT_CONT; + break; + + default: + /* ignore the value */ + break; + } /* clock signal polarity */ invert_bclk = hw_config->invert_bclk; -- 2.11.0