From fea3c39a2eb8401e939b368dd90c03089caa3ed9 Mon Sep 17 00:00:00 2001 From: Antti Palosaari Date: Wed, 25 May 2011 18:21:43 -0300 Subject: [PATCH] [media] anysee: add support for Anysee E7 PS2 Basically it is just same device as Anysee E7 S2 but made for internal PCI(e) slot and motherboard USB connector. Cc: info@anysee.com Signed-off-by: Antti Palosaari Signed-off-by: Mauro Carvalho Chehab --- drivers/media/dvb/dvb-usb/anysee.c | 12 ++++++++++++ drivers/media/dvb/dvb-usb/anysee.h | 1 + 2 files changed, 13 insertions(+) diff --git a/drivers/media/dvb/dvb-usb/anysee.c b/drivers/media/dvb/dvb-usb/anysee.c index 49028aeb5630..a4a5361cf066 100644 --- a/drivers/media/dvb/dvb-usb/anysee.c +++ b/drivers/media/dvb/dvb-usb/anysee.c @@ -434,6 +434,14 @@ static struct isl6423_config anysee_isl6423_config = { * IOD[5] TDA10023 0=disabled * IOD[6] ZL10353 1=enabled * IOE[0] IF 0=enabled + * + * E7 S2 VID=1c73 PID=861f HW=22 FW=0.1 AMTCI=?? "anysee-E7PS2(LP)" + * PCB: 508PS2 (rev0.4) + * parts: DNBU10512IST(STV0903, STV6110), ISL6423 + * OEA=80 OEB=00 OEC=03 OED=f7 OEE=ff + * IOA=4d IOB=00 IOC=c4 IOD=08 IOE=e4 + * IOA[7] TS 1=enabled + * IOE[5] STV0903 1=enabled */ static int anysee_frontend_attach(struct dvb_usb_adapter *adap) @@ -667,7 +675,9 @@ static int anysee_frontend_attach(struct dvb_usb_adapter *adap) break; case ANYSEE_HW_508S2: /* 19 */ + case ANYSEE_HW_508PS2: /* 22 */ /* E7 S2 */ + /* E7 PS2 */ /* enable transport stream on IOA[7] */ ret = anysee_wr_reg_mask(adap->dev, REG_IOA, (1 << 7), 0x80); @@ -794,7 +804,9 @@ static int anysee_tuner_attach(struct dvb_usb_adapter *adap) break; case ANYSEE_HW_508S2: /* 19 */ + case ANYSEE_HW_508PS2: /* 22 */ /* E7 S2 */ + /* E7 PS2 */ /* attach tuner */ fe = dvb_attach(stv6110_attach, adap->fe, diff --git a/drivers/media/dvb/dvb-usb/anysee.h b/drivers/media/dvb/dvb-usb/anysee.h index 3bec60c5565f..24ce5e656e54 100644 --- a/drivers/media/dvb/dvb-usb/anysee.h +++ b/drivers/media/dvb/dvb-usb/anysee.h @@ -69,6 +69,7 @@ struct anysee_state { #define ANYSEE_HW_508TC 18 /* E7 TC */ #define ANYSEE_HW_508S2 19 /* E7 S2 */ #define ANYSEE_HW_508PTC 21 /* E7 PTC Plus */ +#define ANYSEE_HW_508PS2 22 /* E7 PS2 Plus */ #define REG_IOA 0x80 /* Port A (bit addressable) */ #define REG_IOB 0x90 /* Port B (bit addressable) */ -- 2.11.0