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| 2023-10-12 | Daniel Henrique... | target/riscv/cpu.c: add riscv_cpu_add_qdev_prop_array() Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-10-12 | Daniel Henrique... | target/riscv/cpu.c: split vendor exts from riscv_cpu_extensi... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-10-12 | Daniel Henrique... | target/riscv/cpu.c: split non-ratified exts from riscv_cpu_e... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-10-12 | Daniel Henrique... | target/riscv: add DEFINE_PROP_END_OF_LIST() to riscv_cpu_opt... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-10-12 | Daniel Henrique... | target/riscv/cpu.c: split kvm prop handling to its... Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-10-12 | Daniel Henrique... | target/riscv/cpu.c: skip 'bool' check when filtering... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-10-12 | Daniel Henrique... | target/riscv/cpu.c: split CPU options from riscv_cpu_extensi... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Nikita Shubin | target/riscv: don't read CSR in riscv_csrrw_do64 Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Tommy Wu | target/riscv: Align the AIA model to v1.0 ratified... Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Leon Schuermann | target/riscv/pmp.c: respect mseccfg.RLB for pmpaddrX... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Akihiko Odaki | target/riscv: Allocate itrigger timers only once Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Ard Biesheuvel | target/riscv: Use accelerated helper for AES64KS1I Cc: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Robbin Ehn | linux-user/riscv: Add new extensions to hwprobe Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Daniel Henrique... | hw/intc/riscv_aplic.c fix non-KVM --enable-debug build Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Daniel Henrique... | hw/riscv/virt.c: fix non-KVM --enable-debug build Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Vineet Gupta | riscv: zicond: make non-experimental Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Daniel Henrique... | target/riscv: fix satp_mode_finalize() when satp_mode... Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Weiwei Li | target/riscv: Update CSR bits name for svadu extension Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Conor Dooley | hw/riscv: virt: Fix riscv,pmu DT node path Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Yong-Xuan Wang | target/riscv: select KVM AIA in riscv virt machine Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Yong-Xuan Wang | target/riscv: update APLIC and IMSIC to support KVM AIA Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Yong-Xuan Wang | target/riscv: Create an KVM AIA irqchip Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Yong-Xuan Wang | target/riscv: check the in-kernel irqchip support Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Yong-Xuan Wang | target/riscv: support the AIA device emulation with... Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | LIU Zhiwei | linux-user/riscv: Use abi type for target_ucontext Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Jason Chien | hw/intc: Make rtc variable names consistent Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Jason Chien | hw/intc: Fix upper/lower mtime write calculation Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | LIU Zhiwei | target/riscv: Fix zfa fleq.d and fltq.d Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Jason Chien | target/riscv: Add Zihintntl extension ISA string to DTS Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Rob Bradford | target/riscv: Implement WARL behaviour for mcountinhibit... Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Max Chou | target/riscv: Add Zvksed ISA extension support Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Max Chou | crypto: Add SM4 constant parameter CK Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Max Chou | crypto: Create sm4_subword Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Nazar Kazakov | target/riscv: Add Zvkg ISA extension support Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Lawrence Hunter | target/riscv: Add Zvksh ISA extension support Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Kiran Ostrolenk | target/riscv: Add Zvknh ISA extension support Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Nazar Kazakov | target/riscv: Add Zvkned ISA extension support Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Dickon Hood | target/riscv: Add Zvbb ISA extension support Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Kiran Ostrolenk | target/riscv: Refactor some of the generic vector functionality Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Dickon Hood | target/riscv: Refactor translation of vector-widening... Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Nazar Kazakov | target/riscv: Move vector translation checks Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Lawrence Hunter | target/riscv: Add Zvbc ISA extension support Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Nazar Kazakov | target/riscv: Remove redundant "cpu_vl == 0" checks Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Kiran Ostrolenk | target/riscv: Refactor vector-vector translation macro Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Kiran Ostrolenk | target/riscv: Refactor some of the generic vector functionality Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Ard Biesheuvel | target/riscv: Use existing lookup tables for MixColumns Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | LIU Zhiwei | target/riscv: Fix page_check_range use in fault-only... Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Daniel Henrique... | target/riscv/cpu.c: add smepmp isa string Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Daniel Henrique... | target/riscv/cpu.c: add zmmul isa string Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Thomas Huth | hw/char/riscv_htif: Fix the console syscall on big... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Thomas Huth | hw/char/riscv_htif: Fix printing of console characters... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-09-11 | Daniel Henrique... | target/riscv/cpu.c: do not run 'host' CPU with TCG Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-08-11 | Daniel Henrique... | hw/riscv/virt.c: change 'aclint' TCG check Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-08-11 | Daniel Henrique... | target/riscv/kvm.c: fix mvendorid size in vcpu_set_machine_ids() Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-23 | Bin Meng | roms/opensbi: Upgrade from v1.3 to v1.3.1 Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-19 | Rob Bradford | target/riscv: Fix LMUL check to use VLEN Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-19 | Zhao Liu | hw/riscv: Fix typo field in error_report Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-19 | Daniel Henrique... | target/riscv/cpu.c: check priv_ver before auto-enable... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-19 | Christoph Müllner | riscv/disas: Fix disas output of upper immediates Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-19 | Daniel Henrique... | docs/system/target-riscv.rst: tidy CPU firmware section Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Christoph Müllner | riscv: Add support for the Zfa extension Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv/kvm.c: read/write (cbom|cboz)_blocksize... Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv/kvm.c: add kvmconfig_get_cfg_addr() helper Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv: update multi-letter extension KVM properties Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv/cpu.c: create KVM mock properties Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv/cpu.c: remove priv_ver check from riscv_isa_str... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv/cpu.c: add satp_mode properties earlier Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv/kvm.c: add multi-letter extension KVM... Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv/kvm.c: update KVM MISA bits Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv: add KVM specific MISA properties Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv/cpu: add misa_ext_info_arr[] Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv/kvm.c: init 'misa_ext_mask' with scratch CPU Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv: handle mvendorid/marchid/mimpid for KVM... Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv: read marchid/mimpid in kvm_riscv_init_machine_... Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv: use KVM scratch CPUs to init KVM properties Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv/cpu.c: restrict 'marchid' value Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv/cpu.c: restrict 'mimpid' value Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv/cpu.c: restrict 'mvendorid' value Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | hw/riscv/virt.c: skip 'mmu-type' FDT if satp mode not set Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Daniel Henrique... | target/riscv: skip features setup for KVM CPUs Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Lakshmi Bai Raja... | hw/riscv: virt: Convert fdt_load_addr to uint64_t Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Guenter Roeck | riscv: Generate devicetree only after machine initialization... Cc: Alistair Francis <alistair23@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | yang.zhang | target/riscv KVM_RISCV_SET_TIMER macro is not configured... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Weiwei Li | target/riscv: Add disas support for BF16 extensions Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Jason Chien | target/riscv: Set the correct exception for implict... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Weiwei Li | target/riscv: Expose properties for BF16 extensions Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Weiwei Li | target/riscv: Add support for Zvfbfwma extension Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Weiwei Li | target/riscv: Add support for Zvfbfmin extension Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Weiwei Li | target/riscv: Add support for Zfbfmin extension Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Weiwei Li | target/riscv: Add properties for BF16 extensions Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Robbin Ehn | linux-user/riscv: Add syscall riscv_hwprobe Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Philippe Mathieu... | hw/riscv/virt: Restrict ACLINT to TCG Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Ivan Klokov | target/riscv: Add RVV registers to log Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Philippe Mathieu... | target/riscv: Only build KVM guest with same wordsize... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Philippe Mathieu... | target/riscv: Only unify 'riscv32/64' -> 'riscv' for... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Tommy Wu | tests/qtest: sifive-e-aon-watchdog-test.c: Add QTest... Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Tommy Wu | hw/riscv: sifive_e: Support the watchdog timer of HiFive... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Tommy Wu | hw/misc: sifive_e_aon: Support the watchdog timer of... Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Bin Meng | tests/avocado: riscv: Enable 32-bit Spike OpenSBI boot... Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| 2023-07-10 | Bin Meng | roms/opensbi: Upgrade from v1.2 to v1.3 Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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