2014-12-29 | Xiang, Haihao | configure: bump to 1.5.0.pre1 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-15 | Xiang, Haihao | Use intel_batchbuffer_free() to free a batch buffer Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-15 | Xiang, Haihao | Fix misused dri_bo_reference() Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-15 | Xiang, Haihao | Fix the broken out of tree builds Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-15 | Xiang, Haihao | Fix the build of H.264 encoding shaders for SKL Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-15 | Xiang, Haihao | Fix 'make dist' Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-14 | Xiang, Haihao | Sync NEWS with v1.4-branch Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | Add support for quality level for H.264 encoding on SKL Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | SKL and BDW use the same PAK pipeline for H.264/MPEG... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | Add support for VEBOX on SKL (v2) Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: Submit HCP_WEIGHTOFFSET_STATE if required Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: Submit HCP_TILE_STATE if required Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | Advertise the support for HEVC on SKL Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: Make sure the buffer store is allocated for the... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: Verify HEVC parameters before deocoding. Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: update frame store index Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: gen9_hcpd_bsd_object() Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: gen9_hcpd_slice_state() Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: gen9_hcpd_weightoffset_state() Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: gen9_hcpd_ref_idx_state() Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: gen9_hcpd_tile_state() Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: gen9_hcpd_pic_state() Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: gen9_hcpd_hevc_qm_state() Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: Set the default flat IQ matrix Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: gen9_hcpd_ind_obj_base_addr_state() Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: gen9_hcpd_pipe_buf_addr_state() Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: gen9_hcpd_surface_state() Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: gen9_hcpd_pipe_mode_select(); Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: Add the frame store array Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: All internal buffers used for HCP pipe on SKL Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: append a motion vector temporal buffer to a VA... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC: some variables used later Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | Add the initial code for HEVC decoding on SKL into... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | HEVC Codec Pipeline (HCP) commands on SKL Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | Add support for JPEG encoding on SKL Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | Fix SKL media pipeline for VPP Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | Add Makefile.am to build the shader code for VPP on SKL Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | Add the initial support for VPP on SKL Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | SKL: The minimum URB start address for VS is 4 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | SKL: Set the 3DSTATE_VF/3DSTATE_VF_INSTANCING Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | decoder: Remove the dependency on the fixed length... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | decoder: Remove the dependency on H.264 picture parameter Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-12-13 | Xiang, Haihao | decoder: Add struct gen_codec_surface Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-11-26 | Xiang, Haihao | Remove the check against obj_config->profile Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-11-26 | Xiang, Haihao | Remove two fields from struct i965_render_state Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-11-26 | Xiang, Haihao | Remove the check against render_state->interleaved_uv... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-11-14 | Xiang, Haihao | Bump version to 1.4.2.pre1 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-09-30 | Xiang, Haihao | 1.4.1.pre1 for development Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-06-16 | Xiang, Haihao | Check the pointer against NULL Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-06-16 | Xiang, Haihao | 1.3.3.pre1 for development Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-06-16 | Xiang, Haihao | Intel driver 1.3.2 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-06-09 | Xiang, Haihao | Update NEWS for 1.3.2 pre1 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-06-06 | Xiang, Haihao | Fix the scaling issue on IVB/HSW/BDW Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-06-06 | Xiang, Haihao | VPP: Simplify surface state setting for csc and scaling... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-06-06 | Xiang, Haihao | New structure i965_fourcc_info Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-06-06 | Xiang, Haihao | mpeg2: calculate the slice data length on IVB Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-06-06 | Xiang, Haihao | VPP: MADI on SNB Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-06-06 | Xiang, Haihao | VPP: i965_vpp_clear_surface() is still used for CSC... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-06-06 | Xiang, Haihao | Remove unnecessary check with IS_GEN8() Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-05-26 | Xiang, Haihao | mpeg2: check frame_pred_frame_dct instead of progressive_frame Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-05-26 | Xiang, Haihao | Limit the minimum pitch for linear surface Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-05-26 | Xiang, Haihao | Rename HAS_PP() to HAS_VPP() Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-05-26 | Xiang, Haihao | posst_processing_context_init()/finalize() callback... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-05-26 | Xiang, Haihao | render_init()/render_terminate() callback functions... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-05-26 | Xiang, Haihao | Simplify some macros Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-05-26 | Xiang, Haihao | Remove max_wm_threads from render_state Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-05-26 | Xiang, Haihao | Remove URB_SIZE() Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-05-26 | Xiang, Haihao | Dump chipset information in the vendor string Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-05-26 | Xiang, Haihao | Add a new intel_device_info structure Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-05-26 | Xiang, Haihao | Move all of PCIIDs and codec info into separated files Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-05-09 | Xiang, Haihao | 1.3.2.pre1 for development Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-05-09 | Xiang, Haihao | Intel driver 1.3.1 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-05-05 | Xiang, Haihao | Update NEWS Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-05-05 | Xiang, Haihao | Return error when trying to decoding an interlaced... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-05-05 | Xiang, Haihao | Make it buildable against libva 1.3.0 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-04-23 | Xiang, Haihao | Fix bound checking Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-03-25 | Xiang, Haihao | 1.3.1.pre1 for development Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-03-24 | Xiang, Haihao | Intel driver 1.3.0 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-03-24 | Xiang, Haihao | Fix the broken package made by 'make dist' Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-03-18 | Xiang, Haihao | Fix broken make dist Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-03-18 | Xiang, Haihao | Bump version to 1.3.0.pre1 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-03-18 | Xiang, Haihao | Update NEWS Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-03-03 | Xiang, Haihao | configure.ac: update the dependency on intel-gen4asm Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | Remove the redundant if () from gen8_pp_upload_constants Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | Warning fixes Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | Don't use assert() in case getting wrong parameters... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | Use the right parameters to initialize bit rate context Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | Don't advertise CBR for MPEG-2 encoding Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | Remove the whitespace following trailing backslash... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | VEBOX/bdw: set downsample method Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | VEBOX/bdw: DW0-DW8 are used for dndi parameters in... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | Render/BDW: Align each offset with 64 bytes Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | Render/BDW: Initialize the blend_state for rendering Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | Render/HSW: Fix the bug caused by merging code Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | VPP/bdw: Fix the initialize function used for NV12... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | Rendering/bdw: fix push constant buffer for PS Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | BDW doesn't support H.264 Baseline profile Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | Follow the input Picture/Slice parameters for SLICE_STATE... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | Pass the reference frame index in List0/1 into the... Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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2014-02-27 | Xiang, Haihao | Clean up for setting up reference surface state on BDW Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> |
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