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net/tap: Avoid variable-length array
2023-09-18 Peter Maydellnet/tap: Avoid variable-length array
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-09-18 Peter Maydellnet/dump: Avoid variable length array
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-09-18 Peter Maydellhw/net/rocker: Avoid variable length array
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-09-18 Peter Maydellhw/net/fsl_etsec/rings.c: Avoid variable length array
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-09-12 Peter Maydellhw/nvme: Avoid dynamic stack allocation
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-09-08 Peter Maydellblock/iscsi: Document why we use raw malloc()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...ID: <20230727150705.2664464-1-peter.maydell@linaro.org>
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2023-09-08 Peter Maydellhw/display/xlnx_dp: update comments
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-09-04 Peter Maydellui/vnc-enc-hextile: Use static rather than dynamic...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...Id: <20230818151057.1541189-3-peter.maydell@linaro.org>
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2023-09-04 Peter Maydellui/spice-display: Avoid dynamic stack allocation
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...Id: <20230818151057.1541189-2-peter.maydell@linaro.org>
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2023-08-31 Peter Maydellhw/usb/hcd-xhci: Avoid variable-length array in xhci_get_por...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...ID: <20230824164818.2652452-1-peter.maydell@linaro.org>
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2023-08-31 Peter Maydelltests/qtest/netdev-socket: Avoid variable-length array...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...Id: <20230824164535.2652070-1-peter.maydell@linaro.org>
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2023-08-31 Peter Maydellhw/arm: Set number of MPU regions correctly for an505...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230724174335.2150499-4-peter.maydell@linaro.org
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2023-08-31 Peter Maydellhw/arm/armv7m: Add mpu-ns-regions and mpu-s-regions...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230724174335.2150499-3-peter.maydell@linaro.org
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2023-08-31 Peter Maydelltarget/arm: Do all "ARM_FEATURE_X implies Y" checks...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230724174335.2150499-2-peter.maydell@linaro.org
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2023-08-31 Peter Maydellrtc: Use time_t for passing and returning time offsets
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-08-31 Peter Maydellhw/rtc/aspeed_rtc: Use 64-bit offset for holding time_t...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-08-31 Peter Maydellhw/rtc/twl92230: Use int64_t for sec_offset and alm_sec
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-08-31 Peter Maydellhw/rtc/m48t59: Use 64-bit arithmetic in set_alarm()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-08-31 Peter Maydelltarget/arm: Catch illegal-exception-return from EL3...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230807150618.101357-1-peter.maydell@linaro.org
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2023-08-22 Peter Maydelltarget/arm: Adjust PAR_EL1.SH for Device and Normal...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230807141514.19075-16-peter.maydell@linaro.org
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2023-08-22 Peter Maydelltarget/arm/ptw: Report stage 2 fault level for stage...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230807141514.19075-15-peter.maydell@linaro.org
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2023-08-22 Peter Maydelltarget/arm/ptw: Check for block descriptors at invalid...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230807141514.19075-14-peter.maydell@linaro.org
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2023-08-22 Peter Maydelltarget/arm/ptw: Set attributes correctly for MMU disabled...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230807141514.19075-13-peter.maydell@linaro.org
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2023-08-22 Peter Maydelltarget/arm/ptw: Drop S1Translate::out_secure
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230807141514.19075-12-peter.maydell@linaro.org
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2023-08-22 Peter Maydelltarget/arm/ptw: Remove S1Translate::in_secure
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230807141514.19075-11-peter.maydell@linaro.org
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2023-08-22 Peter Maydelltarget/arm/ptw: Remove last uses of ptw->in_secure
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230807141514.19075-10-peter.maydell@linaro.org
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2023-08-22 Peter Maydelltarget/arm/ptw: Only fold in NSTable bit effects in...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230807141514.19075-9-peter.maydell@linaro.org
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2023-08-22 Peter Maydelltarget/arm: Pass an ARMSecuritySpace to arm_is_el2_enabled_s...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230807141514.19075-8-peter.maydell@linaro.org
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2023-08-22 Peter Maydelltarget/arm/ptw: Pass an ARMSecuritySpace to arm_hcr_el2_eff_...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230807141514.19075-7-peter.maydell@linaro.org
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2023-08-22 Peter Maydelltarget/arm/ptw: Pass ARMSecurityState to regime_translation_...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230807141514.19075-6-peter.maydell@linaro.org
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2023-08-22 Peter Maydelltarget/arm/ptw: Pass ptw into get_phys_addr_pmsa*(...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230807141514.19075-5-peter.maydell@linaro.org
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2023-08-22 Peter Maydelltarget/arm/ptw: Set s1ns bit in fault info more consistently
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230807141514.19075-4-peter.maydell@linaro.org
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2023-08-22 Peter Maydelltarget/arm/ptw: Don't report GPC faults on stage 1...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230807141514.19075-3-peter.maydell@linaro.org
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2023-08-22 Peter Maydelltarget/arm/ptw: Don't set fi->s1ptw for UnsuppAtomicUpdate...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230807141514.19075-2-peter.maydell@linaro.org
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2023-08-03 Peter Maydellhw/pci-bridge/cxl_upstream.c: Use g_new0() in build_cdat_table()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...Id: <20230718101327.1111374-1-peter.maydell@linaro.org>
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2023-08-01 Peter Maydelltarget/m68k: Fix semihost lseek offset computation
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...Id: <20230801154519.3505531-1-peter.maydell@linaro.org>
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2023-08-01 Peter Maydellxen: Don't pass MemoryListener around by value
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...Id: <20230718101057.1110979-1-peter.maydell@linaro.org>
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2023-07-31 Peter Maydelltarget/arm/tcg: Don't build AArch64 decodetree files...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230718104628.1137734-1-peter.maydell@linaro.org
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2023-07-31 Peter Maydelltarget/arm: Avoid writing to constant TCGv in trans_CSEL()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230727103906.2641264-1-peter.maydell@linaro.org
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2023-07-25 Peter MaydellUpdate version for v8.1.0-rc1 release
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-25 Peter MaydellMerge tag 'pull-trivial-patches' of https://gitlab...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-25 Peter MaydellMerge tag 'misc-fixes-20230725' of https://github.com...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-25 Peter Maydelltarget/sparc: Handle FPRS correctly on big-endian hosts
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...Id: <20230717103544.637453-1-peter.maydell@linaro.org>
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2023-07-25 Peter Maydelltarget/mips: Avoid shift by negative number in page_table_wa...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-25 Peter MaydellMerge tag 'pull-target-arm-20230725' of https://git...
# gpg: issuer "peter.maydell@linaro.org"
...signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-25 Peter Maydelltests/decode: Suppress "error: " string for expected...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230720131521.1325905-1-peter.maydell@linaro.org
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2023-07-25 Peter Maydelltarget/arm: Special case M-profile in debug_helper...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230721143239.1753066-1-peter.maydell@linaro.org
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2023-07-25 Peter Maydellscripts/git-submodule.sh: Don't rely on non-POSIX ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230720153038.1587196-1-peter.maydell@linaro.org
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2023-07-25 Peter Maydellhw/arm/smmu: Handle big-endian hosts correctly
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230717132641.764660-1-peter.maydell@linaro.org
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2023-07-24 Peter MaydellMerge tag 'pull-request-2023-07-24' of https://gitlab...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-24 Peter MaydellMerge tag 'pull-qapi-2023-07-10' of https://repo.or...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-24 Peter MaydellMerge tag 'pull-riscv-to-apply-20230723-3' of https...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-24 Peter MaydellMerge tag 'pull-revert-armhf-brk-fix' of https://gitlab...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-24 Peter MaydellMerge tag 'pull-tcg-20230724' of https://gitlab.com...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-20 Peter MaydellMerge tag 'pull-nbd-2023-07-19' of https://repo.or...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-20 Peter MaydellMerge tag 'linux-user-brk-fixes-pull-request' of https...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-19 Peter MaydellUpdate version for v8.1.0-rc0 release
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-19 Peter MaydellMerge tag 'pull-riscv-to-apply-20230719-1' of https...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-19 Peter MaydellMerge tag 'nvme-next-pull-request' of https://gitlab...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-19 Peter MaydellMerge tag 'pull-request-2023-07-18' of https://gitlab...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-17 Peter Maydellaccel/tcg: Zero-pad PC in TCG CPU exec trace lines
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230711165434.4123674-1-peter.maydell@linaro.org
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2023-07-17 Peter Maydelltarget/arm/ptw.c: Account for FEAT_RME when applying...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230710152130.3928330-4-peter.maydell@linaro.org
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2023-07-17 Peter Maydelltarget/arm: Fix S1_ptw_translate() debug path
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230710152130.3928330-3-peter.maydell@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-17 Peter Maydelltarget/arm/ptw.c: Add comments to S1Translate struct...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230710152130.3928330-2-peter.maydell@linaro.org
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2023-07-17 Peter Maydelllinux-user: Remove pointless NULL check in clock_adjtime...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230623144410.1837261-1-peter.maydell@linaro.org
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2023-07-06 Peter Maydelltarget/arm: Avoid over-length shift in arm_cpu_sve_finalize...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230704154332.3014896-1-peter.maydell@linaro.org
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2023-07-06 Peter Maydelltarget/arm: Define neoverse-v1
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230704130647.2842917-3-peter.maydell@linaro.org
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2023-07-06 Peter Maydelltarget/arm: Suppress more TCG unimplemented features...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230704130647.2842917-2-peter.maydell@linaro.org
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2023-07-06 Peter Maydelltarget/xtensa: Assert that interrupt level is within...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230623154135.1930261-1-peter.maydell@linaro.org
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2023-07-06 Peter Maydelltests/tcg/aarch64/sysregs.c: Use S syntax for id_aa64zfr0_el...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-07-01 Peter Maydelltarget/nios2 : Explicitly ask for target-endian loads...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...Id: <20230623172556.1951974-1-peter.maydell@linaro.org>
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2023-06-23 Peter Maydellpc-bios/keymaps: Use the official xkb name for Arabic...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230620162024.1132013-1-peter.maydell@linaro.org
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2023-06-23 Peter Maydellhost-utils: Avoid using __builtin_subcll on buggy versions...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230622130823.1631719-1-peter.maydell@linaro.org
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2023-06-21 Peter MaydellRevert "cputlb: Restrict SavedIOTLB to system emulation"
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...Id: <20230620175712.1331625-1-peter.maydell@linaro.org>
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2023-06-19 Peter Maydellhw/timer/nrf51_timer: Don't lose time when timer is...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230606134917.3782215-1-peter.maydell@linaro.org
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2023-06-19 Peter Maydellhw/sd/allwinner-sdhost: Don't send non-boolean IRQ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230606104609.3692557-3-peter.maydell@linaro.org
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2023-06-19 Peter Maydellhw/intc/allwinner-a10-pic: Handle IRQ levels other...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230606104609.3692557-2-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert load/store tags insns to decodetree
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-21-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert load/store single structure to...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-20-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert load/store (multiple structures...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-19-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert LDAPR/STLR (imm) to decodetree
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-18-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert load (pointer auth) insns to decodetree
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-17-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert atomic memory ops to decodetree
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-16-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert LDR/STR reg+reg to decodetree
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-15-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert LDR/STR with 12-bit immediate to...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-14-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert ld/st reg+imm9 insns to decodetree
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-13-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert load/store-pair to decodetree
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-12-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert load reg (literal) group to decodetree
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-11-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert LDXP, STXP, CASP, CAS to decodetree
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-10-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert load/store exclusive and ordered...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-9-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert exception generation instructions...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-8-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert MSR (reg), MRS, SYS, SYSL to decodetree
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-7-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert MSR (immediate) to decodetree
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-6-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert CFINV, XAFLAG and AXFLAG to decodetree
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-5-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert barrier insns to decodetree
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-4-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Convert hint instruction space to decodetree
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-3-peter.maydell@linaro.org
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2023-06-19 Peter Maydelltarget/arm: Consistently use finalize_memop_asimd(...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-06-19 Peter Maydelltarget/arm: Pass memop to gen_mte_check1_mmuidx() in...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-06-19 Peter Maydelltarget/arm: Return correct result for LDG when ATA=0
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2023-06-19 Peter Maydelltarget/arm: Fix return value from LDSMIN/LDSMAX 8/16...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
...id: 20230602155223.2040685-2-peter.maydell@linaro.org
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