2018-01-17 |
Daniel Neilson | [Attributes] Fix crash when attempting to remove alignm... |
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2018-01-17 |
Simon Pilgrim | [X86][BTVER2] Reduce instregex usage (PR35955) |
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2018-01-17 |
Sanjay Patel | [InstCombine] add baseline tests for D39958; NFC |
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2018-01-17 |
Craig Topper | [X86] Teach LowerBUILD_VECTOR to recognize pair-wise... |
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2018-01-17 |
Fangrui Song | [utils] Make .cfi_startproc optional for powerpc |
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2018-01-17 |
Craig Topper | [X86] When legalizing (v64i1 select i8, v64i1, v64i1... |
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2018-01-17 |
Simon Pilgrim | [X86][SSE] Add v4i16 PMULLD tests |
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2018-01-17 |
Zaara Syeda | [PowerPC] Add handling for ColdCC calling convention... |
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2018-01-17 |
Simon Pilgrim | Fix MSVC "not all control paths return a value" warning. |
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2018-01-17 |
Tatyana Krasnukha | [ARC] Add missing condition codes. |
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2018-01-17 |
Jonas Paulsson | [SystemZ] Handle BRCTH branches correctly in SystemZLo... |
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2018-01-17 |
Matt Arsenault | AMDGPU: Error in SIAnnotateControlFlow instead of assert |
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2018-01-17 |
Matt Arsenault | Add tests for ConstantFoldTerminator preserving DomTree |
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2018-01-17 |
Diana Picus | [ARM GlobalISel] Rename local variable. NFC |
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2018-01-17 |
Diana Picus | [ARM GlobalISel] Add instselect tests for G_FPEXT and... |
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2018-01-17 |
Pablo Barrio | [AArch64] Fix incorrect LD1 of 16-bit FP vectors in... |
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2018-01-17 |
Sanjay Patel | [InstCombine] fix demanded-bits propagation for zext... |
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2018-01-17 |
Sanjay Patel | [InstCombine] add test to show hole in demanded bits... |
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2018-01-17 |
Alex Bradbury | [RISCV] Allow RISCVAsmBackend::writeNopData to generate... |
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2018-01-17 |
Diana Picus | [ARM GlobalISel] Map G_FPEXT and G_FPTRUNC to FPR |
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2018-01-17 |
Daniil Fukalov | [AMDGPU] add LDS f32 intrinsics |
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2018-01-17 |
Dmitry Preobrazhensky | [AMDGPU][MC][GFX9] Enable inline constants for SDWA... |
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2018-01-17 |
Diana Picus | [ARM GlobalISel] Legalize G_FPEXT and G_FPTRUNC |
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2018-01-17 |
Ivan A. Kosarev | [Transforms] Support making mutable versions of new... |
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2018-01-17 |
Benjamin Kramer | [X86] Don't mutate shuffle arguments after early-out... |
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2018-01-17 |
Benjamin Kramer | [X86] Constify DebugLoc parameters. No functionality... |
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2018-01-17 |
Hiroshi Inoue | [NFC] fix trivial typos in comments |
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2018-01-17 |
Pavel Labath | Don't emit apple accelerator tables on non-darwin targets |
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2018-01-17 |
Pavel Labath | Rewrite debugger tuning test case to not depend on... |
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2018-01-17 |
Javed Absar | [SCEV] fix typo |
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2018-01-17 |
Simon Pilgrim | [X86][AVX] Add extra 'interleaved+lanepermute' shuffle... |
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2018-01-17 |
George Rimar | [ThinLTO] - Remove code duplication. NFC. |
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2018-01-17 |
Andrew V. Tischenko | Allow usage of X86-prefixes as separate instrs. |
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2018-01-17 |
Sean Eveson | [MC] Fix -stack-size-section on ARM |
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2018-01-17 |
Craig Topper | [X86] In LowerBUILD_VECTOR, rename ExtVT to EltVT so... |
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2018-01-17 |
Craig Topper | [X86] Remove duplicate lines from scheduler models... |
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2018-01-17 |
Aaron Smith | [pdbutil] Replace 0 byte PDB input with correct version... |
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2018-01-17 |
George Burgess IV | [Support] Return an enum instead of an unsigned; NFC. |
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2018-01-17 |
Aaron Smith | Fix build error - 'default label in switch which covers... |
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2018-01-17 |
Aaron Smith | Fix pretty printing the unspecified param of a variadic... |
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2018-01-16 |
Evgeniy Stepanov | [hwasan] Rename sized load/store callbacks to be consis... |
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2018-01-16 |
Simon Pilgrim | [X86][BTVER2] Fix scheduling of VCMPSD/VCMPSS instructions |
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2018-01-16 |
Florian Hahn | [CallSiteSplitting] Pass list of (BB, Conditions) pairs... |
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2018-01-16 |
Simon Pilgrim | [X86][BTVER2] Use instrs instead of instregex for low... |
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2018-01-16 |
Simon Pilgrim | [X86][BTVER2] Use instrs instead of instregex for singl... |
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2018-01-16 |
Rui Ueyama | Specify inline for isWhitespace in CommandLine.cpp |
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2018-01-16 |
Lang Hames | [ExecutionEngine] Rename JITSymbol::isStrongDefinition... |
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2018-01-16 |
Guozhi Wei | [PPC] Add a new register XER aliased to CARRY |
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2018-01-16 |
Francis Visoiu... | [CodeGen] Skip some instructions that shouldn't affect... |
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2018-01-16 |
Volkan Keles | [GlobalISel][TableGen] Add support for SDNodeXForm |
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2018-01-16 |
Alexey Bataev | [SLP] Fix for PR32164: Improve vectorization of reverse... |
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2018-01-16 |
Simon Pilgrim | [X86][MMX] Accept UNDEF upper bits for MOVD GR32->MMX |
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2018-01-16 |
Petar Jovanovic | [LiveDebugValues] update kill-after-spill test with... |
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2018-01-16 |
Petar Jovanovic | [LiveDebugValues] recognize spilled reg killed in instr... |
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2018-01-16 |
Simon Pilgrim | [X86][MMX] Improve MMX constant generation |
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2018-01-16 |
Hiroshi Inoue | [NFC] fix trivial typos in documents |
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2018-01-16 |
Gadi Haber | [X86][I86,I186,I286,I386,I486,PPRO, MMX]: Adding full... |
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2018-01-16 |
Jonas Devlieghere | [DebugInfo] Unify dumping of address ranges |
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2018-01-16 |
Francis Visoiu... | [CodeGen] Remove special case of printing subRegIdx... |
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2018-01-16 |
Francis Visoiu... | [CodeGen][NFC] Correct case for printSubRegIdx |
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2018-01-16 |
Clement Courbet | Add a value_type to ArrayRef. |
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2018-01-16 |
Gadi Haber | [X86][XSAVE]: Adding full coverage of MC encoding for... |
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2018-01-16 |
George Rimar | [FileCheck] - Fix possible buffer out of bounds access... |
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2018-01-16 |
Yonghong Song | [BPF] Mark pseudo insn patterns as isCodeGenOnly |
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2018-01-16 |
Yonghong Song | [BPF] Teach DAG2DAG AND elimination about load intrinsics |
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2018-01-16 |
Hiroshi Inoue | [SROA] fix assetion failure |
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2018-01-16 |
Craig Topper | [X86] Revisit the fix I made years ago to make 'xchgl... |
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2018-01-16 |
Craig Topper | [X86] Make 'xchgq %rax, %rax' an alias for the 0x90... |
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2018-01-15 |
Simon Pilgrim | Avoid Wparentheses warning. |
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2018-01-15 |
Simon Pilgrim | [X86][MMX] Add support for MMX zero vector creation |
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2018-01-15 |
Simon Pilgrim | [X86][SSE] Add custom execution domain fixing for BLEND... |
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2018-01-15 |
Sanjay Patel | [x86] add tests to show missed constant shrinking ... |
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2018-01-15 |
Sanjay Patel | [x86] regenerate test checks; NFC |
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2018-01-15 |
Sanjay Patel | [x86] regenerate test checks; NFC |
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2018-01-15 |
Brian Gesiak | [docs] Only LLVM IR bitstreams begin with 'BC' |
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2018-01-15 |
Sanjay Patel | [x86] regenerate test checks; NFC |
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2018-01-15 |
Craig Topper | [X86] Use MVT::getVectorVT instead of EVT::getVectorVT... |
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2018-01-15 |
Craig Topper | [X86] Generalize some code in LowerBUILD_VECTOR. NFC |
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2018-01-15 |
Craig Topper | [X86] Remove unnecessary if statement from LowerBUILD_V... |
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2018-01-15 |
Dan Gohman | [WebAssembly] Update README.txt. |
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2018-01-15 |
Stanislav Mekhanoshin | [AMDGPU] Add HW_REG_SH_MEM_BASES symbolic name for... |
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2018-01-15 |
Krzysztof Parzyszek | [Hexagon] Implement signed and unsigned multiply-high... |
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2018-01-15 |
Krzysztof Parzyszek | [Hexagon] Rewrite LowerVECTOR_SHUFFLE for 32-/64-bit... |
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2018-01-15 |
Stanislav Mekhanoshin | [AMDGPU] Copy impdefs from pseudo to real instructions |
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2018-01-15 |
Simon Pilgrim | [X86] Fix typos in WriteVMOVNTDQSt and WriteVMOVNTPYSt... |
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2018-01-15 |
Jan Korous | [docs] Fix mention of GCC frontend |
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2018-01-15 |
Dan Gohman | [WebAssembly] Make WasmObjectWriter's destructor public... |
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2018-01-15 |
Jonas Paulsson | [SystemZ] Check for legality before doing LOAD AND... |
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2018-01-15 |
Sam McCall | Allow function_ref(nullptr) like std::function, since... |
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2018-01-15 |
Clement Courbet | [X86] Add missing predicates for VRNDSCALES{D,S}{m,r} |
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2018-01-15 |
Andrew V. Tischenko | Update BTVER2 sched numbers for some AVX instructions... |
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2018-01-15 |
Clement Courbet | [X86]Add missing predicates for VMOVDQUYrm,VMOVDQUYmr. |
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2018-01-15 |
Sander de Smalen | [AArch64][AsmParser] Cleanup isSImm7s4, isSImm7s8,... |
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2018-01-15 |
Clement Courbet | [X86] Fix missing predicates HasAVX512 Predicates in... |
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2018-01-15 |
Pavel Labath | [Support] Remove MemoryBuffer::getNewMemBuffer |
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2018-01-15 |
Benjamin Kramer | Revert "[DAG] Elide overlapping stores" |
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2018-01-15 |
Andrei Elovikov | [LV] Don't call recordVectorLoopValueForInductionCast... |
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2018-01-15 |
Gadi Haber | [X86][AVX512F_512]: Adding full coverage of MC encoding... |
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2018-01-15 |
Mikael Holmen | [GlobalsAA] Don't let dbg intrinsics affect analysis... |
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2018-01-15 |
Max Kazantsev | [NFC] Fix comment to adjust to reality |
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