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qmiga/qemu.git
2023-05-05 Richard Hendersontcg/sparc64: Drop is_64 test from tcg_out_qemu_ld data... commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/s390x: Introduce HostAddress commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/s390x: Pass TCGType to tcg_out_qemu_{ld,st} commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/riscv: Rationalize args to tcg_out_qemu_{ld,st} commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/riscv: Require TCG_TARGET_REG_BITS == 64 commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/ppc: Introduce HostAddress commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/ppc: Rationalize args to tcg_out_qemu_{ld,st} commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/mips: Rationalize args to tcg_out_qemu_{ld,st} commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/loongarch64: Introduce HostAddress commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/loongarch64: Rationalize args to tcg_out_qemu_... commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/arm: Introduce HostAddress commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/arm: Rationalize args to tcg_out_qemu_{ld,st} commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/aarch64: Introduce HostAddress commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/aarch64: Rationalize args to tcg_out_qemu_{ld,st} commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/i386: Introduce tcg_out_testi commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/i386: Drop r0+r1 local variables from tcg_out_tlb_load commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/i386: Introduce HostAddress commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/i386: Generalize multi-part load overlap test commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg/i386: Rationalize args to tcg_out_qemu_{ld,st} commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/sparc: Remove TARGET_ALIGNED_ONLY commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/sparc: Use cpu_ld*_code_mmu commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/sparc: Use MO_ALIGN where required commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/hppa: Remove TARGET_ALIGNED_ONLY commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/hppa: Use MO_ALIGN for system UNALIGN() commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/alpha: Remove TARGET_ALIGNED_ONLY commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/alpha: Use MO_ALIGN where required commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/alpha: Use MO_ALIGN for system UNALIGN() commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontcg: Remove compatability helpers for qemu ld/st commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/xtensa: Finish conversion to tcg_gen_qemu_{ld... commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/sparc: Finish conversion to tcg_gen_qemu_{ld... commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/s390x: Finish conversion to tcg_gen_qemu_{ld... commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/mips: Finish conversion to tcg_gen_qemu_{ld... commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/m68k: Finish conversion to tcg_gen_qemu_{ld... commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/Hexagon: Finish conversion to tcg_gen_qemu_... commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/cris: Finish conversion to tcg_gen_qemu_{ld... commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/avr: Finish conversion to tcg_gen_qemu_{ld,st}_* commit | commitdiff | tree | snapshot
2023-05-05 Shivaprasad... softfloat: Fix the incorrect computation in float32_exp2 commit | commitdiff | tree | snapshot
2023-05-05 Richard HendersonMerge tag 'pull-riscv-to-apply-20230505-1' of https... commit | commitdiff | tree | snapshot
2023-05-05 Rahul Pathaktarget/riscv: add Ventana's Veyron V1 CPU commit | commitdiff | tree | snapshot
2023-05-05 Alexandre Ghitiriscv: Make sure an exception is raised if a pte is... commit | commitdiff | tree | snapshot
2023-05-05 Irina Ryapolovatarget/riscv: Fix Guest Physical Address Translation commit | commitdiff | tree | snapshot
2023-05-05 Bin Mengtarget/riscv: Restore the predicate() NULL check behavior commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: add TYPE_RISCV_DYNAMIC_CPU commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: add query-cpy-definitions support commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: add CPU QOM header commit | commitdiff | tree | snapshot
2023-05-05 Ivan Klokovhw/intc/riscv_aplic: Zero init APLIC internal state commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Reorg sum check in get_physical_address commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Reorg access check in get_physical_address commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Merge checks for reserved pte flags commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Don't modify SUM with is_debug commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Suppress pte update with is_debug commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Move leaf pte processing out of level... commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Hoist pbmte and hade out of the level... commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Hoist second stage mode change to callers commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Check SUM in the correct register commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Set MMU_2STAGE_BIT in riscv_cpu_mmu_index commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Move hstatus.spvp check to check_access_hlsv commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Introduce mmuidx_2stage commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Introduce mmuidx_priv commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Introduce mmuidx_sum commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Rename MMU_HYP_ACCESS_BIT to MMU_2STAGE_BIT commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Handle HLV, HSV via helpers commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Use cpu_ld*_code_mmu for HLVX commit | commitdiff | tree | snapshot
2023-05-05 Fei Wutarget/riscv: Reduce overhead of MSTATUS_SUM change commit | commitdiff | tree | snapshot
2023-05-05 Fei Wutarget/riscv: Separate priv from mmu_idx commit | commitdiff | tree | snapshot
2023-05-05 LIU Zhiweitarget/riscv: Add a tb flags field for vstart commit | commitdiff | tree | snapshot
2023-05-05 Richard Hendersontarget/riscv: Remove mstatus_hs_{fs, vs} from tb_flags commit | commitdiff | tree | snapshot
2023-05-05 LIU Zhiweitarget/riscv: Encode the FS and VS on a normal way... commit | commitdiff | tree | snapshot
2023-05-05 LIU Zhiweitarget/riscv: Add a general status enum for extensions commit | commitdiff | tree | snapshot
2023-05-05 LIU Zhiweitarget/riscv: Extract virt enabled state from tb flags commit | commitdiff | tree | snapshot
2023-05-05 Yi Chentarget/riscv: fix H extension TVM trap commit | commitdiff | tree | snapshot
2023-05-05 Weiwei Litarget/riscv: Use check for relationship between Zdinx... commit | commitdiff | tree | snapshot
2023-05-05 Weiwei Litarget/riscv: Legalize MPP value in write_mstatus commit | commitdiff | tree | snapshot
2023-05-05 Weiwei Litarget/riscv: Use PRV_RESERVED instead of PRV_H commit | commitdiff | tree | snapshot
2023-05-05 Weiwei Litarget/riscv: Fix the mstatus.MPP value after executing... commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv/cpu.c: redesign register_cpu_props() commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: add RVG and remove cpu->cfg.ext_g commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: remove cfg.ext_g setup from rv64_thead_c9... commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: remove riscv_cpu_sync_misa_cfg() commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_v commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_j commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_h commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_u commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_s commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_m commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_e commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_i commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_f commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_d commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_c commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: remove cpu->cfg.ext_a commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: introduce riscv_cpu_add_misa_properties() commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv/cpu.c: remove 'multi_letter' from isa_ext_data commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: remove MISA properties from isa_edata_arr[] commit | commitdiff | tree | snapshot
2023-05-05 Daniel Henrique... target/riscv: sync env->misa_ext* with cpu->cfg in... commit | commitdiff | tree | snapshot
2023-05-05 Weiwei Lihw/riscv: Add signature dump function for spike to... commit | commitdiff | tree | snapshot
2023-05-05 Weiwei Litarget/riscv: Fix lines with over 80 characters commit | commitdiff | tree | snapshot
2023-05-05 Weiwei Litarget/riscv: Fix format for comments commit | commitdiff | tree | snapshot
2023-05-05 Weiwei Litarget/riscv: Fix format for indentation commit | commitdiff | tree | snapshot
2023-05-05 Weiwei Litarget/riscv: Remove riscv_cpu_virt_enabled() commit | commitdiff | tree | snapshot
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