From 057fab3382c02af54126ce395c43d4e6dce9439a Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Tue, 26 Oct 2010 11:35:11 +0100 Subject: [PATCH] intel: Prepare for BLT ring split. Signed-off-by: Chris Wilson --- include/drm/i915_drm.h | 7 ++++++- intel/intel_bufmgr_gem.c | 28 +++++++++++++++++++++++----- 2 files changed, 29 insertions(+), 6 deletions(-) diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index 75944134..bd930614 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h @@ -206,6 +206,7 @@ typedef struct _drm_i915_sarea { #define DRM_IOCTL_I915_SET_VBLANK_PIPE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SET_VBLANK_PIPE, drm_i915_vblank_pipe_t) #define DRM_IOCTL_I915_GET_VBLANK_PIPE DRM_IOR( DRM_COMMAND_BASE + DRM_I915_GET_VBLANK_PIPE, drm_i915_vblank_pipe_t) #define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t) +#define DRM_IOCTL_I915_HWS_ADDR DRM_IOW(DRM_COMMAND_BASE + DRM_I915_HWS_ADDR, struct drm_i915_gem_init) #define DRM_IOCTL_I915_GEM_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_INIT, struct drm_i915_gem_init) #define DRM_IOCTL_I915_GEM_EXECBUFFER DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER, struct drm_i915_gem_execbuffer) #define DRM_IOCTL_I915_GEM_EXECBUFFER2 DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER2, struct drm_i915_gem_execbuffer2) @@ -276,6 +277,7 @@ typedef struct drm_i915_irq_wait { #define I915_PARAM_HAS_PAGEFLIPPING 8 #define I915_PARAM_HAS_EXECBUF2 9 #define I915_PARAM_HAS_BSD 10 +#define I915_PARAM_HAS_BLT 11 typedef struct drm_i915_getparam { int param; @@ -617,8 +619,11 @@ struct drm_i915_gem_execbuffer2 { __u32 num_cliprects; /** This is a struct drm_clip_rect *cliprects */ __u64 cliprects_ptr; +#define I915_EXEC_RING_MASK (7<<0) +#define I915_EXEC_DEFAULT (0<<0) #define I915_EXEC_RENDER (1<<0) -#define I915_EXEC_BSD (1<<1) +#define I915_EXEC_BSD (2<<0) +#define I915_EXEC_BLT (3<<0) __u64 flags; __u64 rsvd1; __u64 rsvd2; diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index 60174e19..c5847a8a 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c @@ -99,6 +99,8 @@ typedef struct _drm_intel_bufmgr_gem { int available_fences; int pci_device; int gen; + char has_bsd; + char has_blt; char bo_reuse; char fenced_relocs; } drm_intel_bufmgr_gem; @@ -1545,8 +1547,21 @@ drm_intel_gem_bo_mrb_exec2(drm_intel_bo *bo, int used, struct drm_i915_gem_execbuffer2 execbuf; int ret, i; - if ((ring_flag != I915_EXEC_RENDER) && (ring_flag != I915_EXEC_BSD)) + switch (ring_flag) { + default: return -EINVAL; + case I915_EXEC_BLT: + if (!bufmgr_gem->has_blt) + return -EINVAL; + break; + case I915_EXEC_BSD: + if (!bufmgr_gem->has_bsd) + return -EINVAL; + break; + case I915_EXEC_RENDER: + case I915_EXEC_DEFAULT: + break; + } pthread_mutex_lock(&bufmgr_gem->lock); /* Update indices and set up the validate list. */ @@ -2054,7 +2069,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) struct drm_i915_gem_get_aperture aperture; drm_i915_getparam_t gp; int ret; - int exec2 = 0, has_bsd = 0; + int exec2 = 0; bufmgr_gem = calloc(1, sizeof(*bufmgr_gem)); if (bufmgr_gem == NULL) @@ -2107,8 +2122,11 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) gp.param = I915_PARAM_HAS_BSD; ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); - if (!ret) - has_bsd = 1; + bufmgr_gem->has_bsd = ret == 0; + + gp.param = I915_PARAM_HAS_BLT; + ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); + bufmgr_gem->has_blt = ret == 0; if (bufmgr_gem->gen < 4) { gp.param = I915_PARAM_NUM_FENCES_AVAIL; @@ -2165,7 +2183,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) /* Use the new one if available */ if (exec2) { bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec2; - if (has_bsd) + if (bufmgr_gem->has_bsd|bufmgr_gem->has_blt) bufmgr_gem->bufmgr.bo_mrb_exec = drm_intel_gem_bo_mrb_exec2; } else bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec; -- 2.11.0