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| 2018-09-05 | Lucas De Marchi | intel: make gen10 use generic gen macro Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2018-09-05 | Lucas De Marchi | intel: make gen11 use generic gen macro Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2018-09-05 | Lucas De Marchi | intel: add generic functions to check PCI ID Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2018-08-14 | Rodrigo Vivi | intel: Add a new CFL PCI ID. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2018-06-20 | José Roberto de... | intel: Introducing Amber Lake platform Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2018-06-20 | José Roberto de... | intel: Introducing Whiskey Lake platform Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2018-04-24 | Matt Atwood | Intel: Add a Kaby Lake PCI ID Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2018-03-05 | Rodrigo Vivi | intel/intel_chipset.h: Sync Cannonlake IDs. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2018-01-11 | Anuj Phogat | intel: Add more Coffeelake PCI IDs Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2017-09-21 | Anuj Phogat | intel: Change a KBL pci id to GT2 from GT1.5 Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2017-06-30 | Rodrigo Vivi | intel/intel_chipset: Move IS_9XX below IS_GEN10. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2017-06-30 | Paulo Zanoni | intel: add GEN10 to IS_9XX. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2017-06-30 | Ben Widawsky | intel/gen10: Add missed gen10 stuff Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2017-06-30 | Rodrigo Vivi | intel: Add Cannonlake PCI IDs for Y-skus. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2017-06-30 | Rodrigo Vivi | intel: Add Cannonlake PCI IDs for U-skus. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2017-06-29 | Anusha Srivatsa | intel: PCI Ids for U SKU in CFL Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2017-06-29 | Anusha Srivatsa | intel: PCI Ids for H SKU in CFL Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2017-06-29 | Anusha Srivatsa | intel: PCI Ids for S SKU in CFL Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2016-06-29 | Rodrigo Vivi | intel: Removing PCI IDs that are no longer listed as... Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2016-06-29 | Rodrigo Vivi | intel: Add more Kabylake PCI IDs. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2016-03-02 | Rodrigo Vivi | intel: Adding missing Broxton PCI IDs. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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