Update aosp/master LLVM for rebase to r235153

[android-x86/external-llvm.git] / test / CodeGen / PowerPC / fast-isel-load-store-vsx.ll

diff --git a/test/CodeGen/PowerPC/fast-isel-load-store-vsx.ll b/test/CodeGen/PowerPC/fast-isel-load-store-vsx.ll
index ab439cd..8a873da 100644 (file)
--- a/test/CodeGen/PowerPC/fast-isel-load-store-vsx.ll
+++ b/test/CodeGen/PowerPC/fast-isel-load-store-vsx.ll
@@ -1,15 +1,12 @@
-;; There are some known limitations in the VSX support during FastIsel 
-;; (see fast-isel-load-store.ll header). Nevertheless, we are adding some 
-;; regressions here for bugs we fix in the meantime
 ; RUN: llc < %s -O0 -fast-isel -mattr=+vsx -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64VSX
 
 ;; The semantics of VSX stores for when R0 is used is different depending on
 ;; whether it is used as base or offset. If used as base, the effective
-;; address computation will use zero regardless the content of R0. If used as
-;; offset, the content will be used in the effective address. We observed that
+;; address computation will use zero regardless of the content of R0. If used as
+;; an offset the content will be used in the effective address. We observed that
 ;; for some constructors, the initialization values were being stored without
-;; any offset register being specified which was causing R0 to be used as offset
-;; in regions where it contained the value in the link register. This regression
+;; an offset register being specified which was causing R0 to be used as offset
+;; in regions where it contained the value in the link register. This test
 ;; verifies that R0 is used as base in these situations.
 
 %SomeStruct = type { double }
@@ -28,6 +25,4 @@ entry:
   %0 = load double, double* %V.addr, align 8
   store double %0, double* %Val, align 8
   ret void
- } 
-
-
+ }