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(parent: fce2e3b) | patch
radeonsi: flush TC L2 cache for indirect draw data
authorNicolai Hähnle <nicolai.haehnle@amd.com>
Mon, 8 Aug 2016 15:06:22 +0000 (17:06 +0200)
committerEmil Velikov <emil.l.velikov@gmail.com>
Thu, 1 Sep 2016 09:06:23 +0000 (10:06 +0100)
commit1959b57310afc6138ac6587fa161d300afd22bfb
treecabd1b7f09485187f565800bb7732840cae310cetree | snapshot
parentfce2e3b493129ce865ee9dec5415604dc2422421commit | diff
radeonsi: flush TC L2 cache for indirect draw data

This fixes a bug when indirect draw data is generated by transform
feedback.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 2852dedaa0c45e426a53ba0042ecdb0f1b87950f)
src/gallium/drivers/radeonsi/si_descriptors.c diff | blob | history
src/gallium/drivers/radeonsi/si_state_draw.c diff | blob | history
external/mesa
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