radv: Fix off by one in MAX_VBS assert.

e.g. 0 + 32 <= 32 should be valid.

Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit fba0e078695847bf1e4fdc9e6a44099bf901f4cf)

st/mesa: fix handling of vertex array double inputs

The is_double_vertex_input needs to be set for arrays of doubles as
well.

Fixes KHR-GL45.enhanced_layouts.varying_array_locations

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit ae53bff8b13b433ca79904dfbda7264eb7188fa7)

glsl: fix counting of vertex shader output slots used by explicit vars

The argument to count_attribute_slots should only be set to true for
vertex inputs, not for all vertex shader varyings.

Fixes KHR-GL45.enhanced_layouts.varying_locations

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit eefeff09a784eb139cbf682b98926c0eaa00eb21)

etnaviv: use correct param for etna_compatible_rs_format(..)

Found by code inspection.

Fixes: c9e8b49b885 ("etnaviv: gallium driver for Vivante GPUs")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit 67fc3e37a7a38e279082848c064d5faacad44f54)

docs: add sha256 checksums for 17.1.8

Signed-off-by: Andres Gomez <agomez@igalia.com>

docs: add release notes for 17.1.8

Signed-off-by: Andres Gomez <agomez@igalia.com>

Update version to 17.1.8

Signed-off-by: Andres Gomez <agomez@igalia.com>

cherry-ignore: add "egl/drm: Fix misused x and y offsets in swrast_*_image*"

fixes: Depend on earlier commit 04a40f7d2a that did not land in branch
and which exposes new API.

Signed-off-by: Andres Gomez <agomez@igalia.com>

cherry-ignore: add "i965: Make a BRW_NEW_FAST_CLEAR_COLOR dirty bit."

stable: 17.2 nomination only. Depends on earlier commit f296c22989ff
which did not land in branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>

cherry-ignore: add "i965/tex: Don't pass samples to miptree_create_for_teximage"

stable: Depends on earlier commit 76e2f390f98 which did not land in
branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>

cherry-ignore: cherry-ignore: added 17.2 nominations.

stable: 17.2 nominations only.

Signed-off-by: Andres Gomez <agomez@igalia.com>

radv: don't crash if we have no framebuffer

Recording secondaries with no framebuffer attachment may
make this happen, though this might not be the complete solution.

(esp if someone does meta stuff in there, would we have to
save things, not sure).

Fixes: f4e499ec791 ("radv: add initial non-conformant radv vulkan driver")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 4a091b0788664f73bbb35c14d04c00cebf37e17a)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>
Conflicts:
src/amd/vulkan/radv_cmd_buffer.c

egl/wayland: Use roundtrips when awaiting buffer release

In get_back_bo, we use wl_display_dispatch_queue() to block and wait for
a buffer release event. However, not all Wayland compositors flush the
client socket on posting a buffer-release event, so by only blocking
client-side, we may block indefinitely, or at least need to wait for an
input event / frame completion to arrive for the compositor to flush.

We now use dispatch_queue as a first pass, but if our entire buffer pool
is exhausted, use a roundtrip (an immediately-triggered wl_callback) to
ensure that the compositor flushes out our release event immediately.

[daniels: Modified comment and commit message.]

Signed-off-by: Kai Chen <kai.chen@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
CC: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 151188d1e330a7a5f110bbc8251680121a1a84a6)

nv50/ir: properly set sType for TXF ops to U32

All of the coordinates and LOD args are integers for TXF. This mostly
doesn't matter, except for converting into a levelZero=true operation by
removing an explicit zero LOD. For the comparison against zero to work
properly, the sType of the instruction has to be set correctly.

Fixes: KHR-GL45.robust_buffer_access_behavior.texel_fetch
Reported-by: Karol Herbst <karolherbst@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 96be442b7795a6eb3d50f4061f2b98dddc39aa4d)

radeonsi/gfx9: add a temporary workaround for a tessellation driver bug

The workaround will do for now. The root cause is still unknown.

This fixes new piglit: 16in-1out

Cc: 17.1 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 166823bfd26ff7e9b88099598305967336525716)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>
Conflicts:
src/gallium/drivers/radeonsi/si_state_draw.c

intel/blorp: Adjust intra-tile x when faking rgb with red-only

v2 (Jason): Adjust directly in surf_fake_rgb_with_red()

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101910

CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
(cherry picked from commit 393ec1a5071263d300e91f43058ed3b594d41418)

mesa: only copy requested compressed teximage cubemap faces

This is analogous to commit 2259b11 which only fixed the regular case

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102308
Signed-off-by: Christoph Haag <haagch+mesadev@frickel.club>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 87556a650ad363b41d86f4e25d5c4696f9af4550)
[Andres Gomez: helpers had not yet been refactored]
Signed-off-by: Andres Gomez <agomez@igalia.com>
Conflicts:
src/mesa/main/teximage.c

i965: Stop looking at NewDriverState when emitting 3DSTATE_URB

Looking at NewDriverState is not safe in general.  The state atom system
is set up to ensure that new bits that get added to NewDriverState get
accumulated into the set of bits used when emitting atoms but it doesn't
go the other way.  If we read NewDriverState, we may not get the full
picture because the per-pipeline state (3D or compute) does not get
added to NewDriverState before state emit is done.  It's especially
dangerous to do this from BLORP (either explicitly or implicitly when
BLORP calls gen7_upload_urb) because that does not happen during one of
the normal state upload paths.

This commit solves the problem by whacking all of the per-shader-stage
URB sizes to zero whenever we change the total URB size.  We still have
to flag BRW_NEW_URB_SIZE to ensure that the gen7_urb atom triggers but
the actual decision in gen7_upload_urb can now be based entirely on URB
sizes rather than on state atoms.  This also makes BLORP correct because
it just asks for a new URB config whenever the vsize is too small and so
any change to the total URB size will trigger blorp to re-emit as well
because 0 < vs_entry_size.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Bugzilla: https://bugs.freedesktop.org/102289
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit d5e217dbfda2a87e149bdc8586c25143fc0ac183)

glsl: add a few missing int64 constant propagation cases

Fixes KHR-GL45.shader_ballot_tests.ShaderBallotAvailability, which
causes some silly swizzles to appear, triggering this optimization to
get hit.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 9c8f017f77188d9048132a30d31f18b9690cbe04)

i965: perf: minimize the chances to spread queries across batchbuffers

Counter related to timings will be sensitive to any delay introduced
by the software. In particular if our begin & end of performance
queries end up in different batches, time related counters will
exhibit biffer values caused by the time it takes for the kernel
driver to load new requests into the hardware.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit adafe4b733c0242720ccfe10d391e5d44c0e7401)

swr/rast: switch gen_knobs.cpp license

Unintentionally added with an apache2 license; relicense to match
the rest of the tree.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
(cherry picked from commit fb3e50a351b52014479a9a81226b7c51b176afed)

docs: add sha256 checksums for 17.1.7

Signed-off-by: Andres Gomez <agomez@igalia.com>

docs: add release notes for 17.1.7

Signed-off-by: Andres Gomez <agomez@igalia.com>

Update version to 17.1.7

Signed-off-by: Andres Gomez <agomez@igalia.com>

cherry-ignore: add "radv: handle 10-bit format clamping workaround."

fixes: This commit is complex and has non trivial conflicts due to
previous changes.

Signed-off-by: Andres Gomez <agomez@igalia.com>

cherry-ignore: add "virgl: drop precise modifier."

fixes: This commit addressed an earlier commit af22adee4f which did
not land in branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>

cherry-ignore: add "radv: Handle VK_ATTACHMENT_UNUSED in color attachments."

fixes: This commit is complex and has non trivial conflicts due to
multiple previous changes.

Signed-off-by: Andres Gomez <agomez@igalia.com>

cherry-ignore: added 17.2 nominations.

stable: 17.2 nominations only.

Signed-off-by: Andres Gomez <agomez@igalia.com>

cherry-ignore: add "configure: remove trailing "-a" in swr architecture teststable: 17.2 nomination only."

stable: 17.2 nomination only. Depends on earlier commit 1cb5a6061c
which did not land in branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>

cherry-ignore: add "radeon/ac: use ds_swizzle for derivs on si/cik."

stable: Depends on earlier commit 28634ff7d3 which did not land in
branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>

cherry-ignore: add "swr: use the correct variable for no undefined symbols"

stable: Breaks SWR compilation due to earlier commit f50aa21456 which
did not land in branch.

Signed-off-by: Andres Gomez <agomez@igalia.com>

util: Fix build on old glibc.

We need to link librt for u_thread.h's clock_gettime() call.

Fixes: b822d9dd67b5 ("gallium/util: move u_queue.{c,h} to src/util")
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit b94ddc181bc514bd32c1d4103aa1c7582a7a60ff)

radv: force cs/ps/l2 flush at end of command stream. (v2)

This seems like a workaround, but we don't see the bug on CIK/VI.

On SI with the dEQP-VK.memory.pipeline_barrier.host_read_transfer_dst.*
tests, when one tests complete, the first flush at the start of the next
test causes a VM fault as we've destroyed the VM, but we end up flushing
the compute shader then, and it must still be in the process of doing
something.

Could also be a kernel difference between SI and CIK.

v2: hit this with a bigger hammer. This fixes a bunch of hangs
in the vk cts with the robustness tests.

Fixes: f4e499ec791 ("radv: add initial non-conformant radv vulkan driver")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101334
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 82ba384c10d598bee4786ef5f79e92a0e7b53892)

radv: fix MSAA on SI gpus.

This ports the workaround from radeonsi, that was missing in radv.

This fixes Talos rendering when MSAA is enabled on my Tahiti card.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: f4e499ec7 (radv: add initial non-conformant radv vulkan driver)
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 8bf39307517a04263532e3c5a49b5be1f4a99032)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>
Conflicts:
src/amd/vulkan/radv_device.c

radv: fix f16->f32 denorm handling for SI/CIK. (v2)

This just copies the code from the -pro shaders,
and fixes the tests on CIK.

With this CIK passes the same set of conformance
tests as VI.

Fixes: 83e58b03 (radv: flush f32->f16 conversion denormals to zero. (v2))
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 3f389f75b6e9b55467aca681af09b83998ee0e46)

nv50/ir: fix TXQ srcMask

src0.x is always read for the LOD, irrespective of which outputs are
read.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 934511d1f3a8e2e9b0091d725c87a22a51233141)

nv50/ir: fix srcMask computation for TG4 and TXF

This affects which inputs are marked as used. In a situation where only
the texture instruction uses an input, it might have been ignored as
unused due to input masks.

Affects subtests of KHR-GL45.texture_cube_map_array.sampling

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 054c54d1be634dec106c30030bb4921f398d6c90)

gallium/os: fix os_time_get_nano() to roll over less

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102241
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
(cherry picked from commit 7fb7287ce72066db7dffd918226bf15c3131a871)

st/wgl: check for negative delta in wait_swap_interval()

This can happen because of rollover.  See bug report for details.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102241
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
(cherry picked from commit d90e05ad487e9fe7e17c293814ac8549d9d686d8)

st/mesa: fix a null pointer access

Fixes crash with llvmpipe on Windows.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102148
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 496a691e3544d082670ac1f33059692510a2a86d)

swr/rast: Fix invalid casting for calls to Interlocked* functions

CID: 1416243, 1416244, 1416255
CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
(cherry picked from commit b333bc753e2dd1ed1a676606046a4289e7d58187)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>
Conflicts:
src/gallium/drivers/swr/rasterizer/core/api.cpp
src/gallium/drivers/swr/rasterizer/core/threads.cpp

glsl/ast: update rhs in addition to the var's constant_value

We continue in the code to do some more things with the rhs, including
setting a constant initializer. If the type is wrong, this causes some
confusion down the line, leading to assertions. This makes sure that the
rhs processing continues to flow as-if the type was correct to start
with (even though the state has been marked as an error state).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101766
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 978c4c597aa48e65bd6822a85e6b8f82ca9281f1)

radeonsi: disable CE by default

It makes performance worse by a very small (hard to measure) amount.
We've done extensive profiling of this feature internally.

Cc: 17.1 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit 1ab7fed7079a8b0f670d6a51ddc98691ace29508)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>
Conflicts:
src/gallium/drivers/radeonsi/si_pipe.c

egl: avoid eglCreatePlatform*Surface{EXT,} crash with invalid dpy

If we have an invalid display fed into the functions, the display lookup
will return NULL. Thus as we attempt to get the platform type, we'll
deref. it leading to a crash.

Keep in mind that this will not happen if Mesa is built without X11 or
when the legacy eglCreate*Surface codepaths are used.

A similar check was added with earlier commit 5e97b8f5ce9 ("egl: Fix
crashes in eglCreate*Surface), although it was only applicable when the
surfaceless platform is built.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 26fbb9eacddb1b809739cb12477bde13501d6d5a)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>
Conflicts:
src/egl/main/eglapi.c

ac: fail shader compilation if libelf is replaced by an incompatible version

UE4Editor has this issue.

This commit prevents hangs (release build) or assertion failures (debug
build). It doesn't fix the editor, but catastrophic scenarios are
prevented.

Cc: 17.1 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 4630ede1021d49c610de1274dc9d1006b843e46b)

nv50/ir: fix ConstantFolding with saturation

For mul(a, +-1) codegen can generate OP_MOV with a saturation flag
set which is ignored at emission. The same can happen with add(a, 0),
and others.

Adding an assert for detecting more of such issues.

Fixes wrongly rendered water in Hitman Absolution running under wine.
Also a few shaders in Mad Max and Alien Isolation produce such MOVs.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
[imirkin: generalize the fix for other cases]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
(cherry picked from commit 24a799ad35a824fba94062f9b018f603717ed145)

squashed with:

nv50/ir: clean up saturated values immediately

Since we don't iterate to a fixed point, we can end up in situations
where we have a SAT instruction + a long immediate. This is not legal.
However since it's immediately computable, just run unary straight away
to handle the situation.

Fixes: 24a799ad35a82 ("nv50/ir: fix ConstantFolding with saturation")
Reported-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 165e18dd219fbf4d60fd582b02e2dbf75ccd026f)

anv/formats: Allow sampling on depth-only formats on gen7

We can't sample from depth-stencil formats but on gen7 but we can sample
from depth-only formats.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102024
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 06d3115bb97740a4c8f36c645944a8bd0bde3f68)

radv: avoid GPU hangs if someone does a resolve with non-multisample src (v2)

This is a bug in the app, but I'd rather avoid hanging the GPU,
esp if someone is running in validation and it takes out their
development environment.

v2: get it right, reverse the polarity.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 36a1b61321561634c6b243cf876c347fef73dfa4)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>
Conflicts:
src/amd/vulkan/radv_meta_resolve.c

egl/x11: don't leak xfixes_query in the error path

If we get a xfixes v1.x we'll error out, without freeing the
xfixes_query reply.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit c961b679fe16fc98c3d04d611abc287f1bcc07b5)

intel/vec4/gs: reset nr_pull_param if DUAL_INSTANCED compile failed.

If dual object compile fails (as seems to happen with virgl a
fair bit, and does piglit even have any tests for it?), we end up
not restarting the pull params, so we call
vec4_visitor::move_uniform_array_access_to_pull_constant
a second time and it runs over the ends of the alloc.

Fixes: tests/spec/glsl-1.50/execution/geometry/max-input-components.shader_test
running inside virgl on ivybridge.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 271fa3a684ef0eefe99087c13d1abb099784163f)

i965/blit: Remember to include miptree buffer offset in relocs

Remember to add the offset to the start of the buffer in the relocation
or else we write 0xff into random bytes elsewhere.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit fb63c43fd1b7adb5cb4f34e7616e7d564ca178e5)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>
Conflicts:
src/mesa/drivers/dri/i965/intel_pixel_bitmap.c

i965: Delete pitch alignment assertion in get_blit_intratile_offset_el.

The cacheline alignment restriction is on the base address; the pitch
can be anything.

Fixes assertion failures when using primus (say, on glxgears, which
creates a 300x300 linear BGRX surface with a pitch of 1200):

intel_blit.c:190: get_blit_intratile_offset_el: Assertion `mt->surf.row_pitch % 64 == 0' failed.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
(cherry picked from commit 595a47b8293b1d97a3ae7dbfa8db703bfb4e7aae)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez@igalia.com>
Conflicts:
src/mesa/drivers/dri/i965/intel_blit.c

ac/nir: fix lsb emission

This makes it match radeonsi. The LLVM backend itself will emit the
correct instruction, but LLVM might do incorrect optimizations since it
thinks the output is undefined when the input is 0, even though it's not
supposed to be. We really need a new intrinsic, or for the backend to
become smarter and recognize this pattern.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <basni@google.com>
(cherry picked from commit 6d731c5651ea98551e0bf0c1a8896d5ea63558d5)
[Andres Gomez: nir_to_llvm_context not yet converted into ac_llvm_context]
Signed-off-by: Andres Gomez <agomez@igalia.com>
Conflicts:
src/amd/common/ac_nir_to_llvm.c

docs: add sha256 checksums for 17.1.6

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

docs: add release notes for 17.1.6

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Update version to 17.1.6

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

swr/rast: fix scons gen_knobs.h dependency

Copy/paste error was duplicating a gen_knobs.cpp rule.

Fixes: 5079c277b57 ("swr: [scons] Fix windows build")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
(cherry picked from commit e4a6ae06cf01a21d7fe32e3ff2fc441102d68f82)

radv: Don't underflow non-visible VRAM size.

In some APU situations the reported visible size can be larger than
VRAM size. This properly clamps the value.

Surprisingly both CTS and spec seem to allow a heap type with size 0,
so this seemed like the easiest option to me.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Fixes: 4ae84efbc5c "radv: Use enum for memory heaps."
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
(cherry picked from commit 8229706ad86b27ed571f17872006a488fcd35378)
[Emil Velikov: branch uses radeon_info::visible_vram_size]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/amd/vulkan/radv_device.c

spirv: Fix SpvImageFormatR16ui

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "17.1 17.2" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 95c6a97464e7baaca6e09f829da0be5ac8c50297)

dri3: Wait for all pending swapbuffers to be scheduled before touching the front

This implements a wait for glXWaitGL, glXCopySubBuffer, dri flush_front and
creation of fake front until all pending SwapBuffers have been committed to
hardware. Among other things this fixes piglit glx-copy-sub-buffers on dri3.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 185ef06fd2db782d9d3d6046580f7cece02c4797)

gallium/radeon: fix ARB_query_buffer_object conversion to boolean

The issue here is that the immediate is treated as a 64-bit value,
and fetching it does not work reliably with swizzles that are different
from xy and zw.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit da83687c4ba7e9022f6f14176393a9e3c6391ed5)

fixup! cherry-ignore: add a bunch more commits to the list

nir: fix algebraic optimizations

The optimizations are only valid for 32-bit integers. They were
mistakenly firing for 64-bit integers as well.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit de914615753678c5514733a37ac7d0360a43e525)

cherry-ignore: add a bunch more commits to the list

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

etnaviv: fix memory leak when BO allocation fails

The resource struct is already allocated at this point and should be
freed properly.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
(cherry picked from commit 4fb9f97047eb1e43c47cb7cacba27ccd20383eff)

st/dri: Check get-handle return value in queryImage

In the DRIImage queryImage hook, check if resource_get_handle() failed
and return FALSE if so.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit b4a18f13ce7f0e7d0307fb3388819345616752ce)
[Emil Velikov: drop offset and modifier hunks - not in branch]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/gallium/state_trackers/dri/dri2.c

radv: for stencil only set Z tile mode index to same value

On SI this was causing a hang in
dEQP-VK.pipeline.render_to_image.core.2d_array.mipmap.r16g16_sint_s8_uint

This was due to not handling the tile mode index for depth like
I fixed previously for new GPUs.

Fixes: 01d0c5a9 (radv: fix stencil regression since new addrlib import)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 800d1622096ca52b955bdfc20eb770b80ef15221)
[Emil Velikov: XXX]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/amd/vulkan/radv_device.c

radv/ac: port SI TC L1 write corruption fix.

This ports 72e46c988 to radv.
    radeonsi: apply a TC L1 write corruption workaround for SI

Fixes: f4e499ec7 (radv: add initial non-conformant radv vulkan driver)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit e77ff11ffe1a52b8e17a847f263746c849db3f11)

radv/ac: realign SI workaround with radeonsi.

This ports: da7453666ae
radeonsi: don't apply the Z export bug workaround to Hainan
to radv.

Just noticed in passing.

Fixes: f4e499ec7 (radv: add initial non-conformant radv vulkan driver)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit a81e99f50a718790de379087c9f5a636e32b2a28)

radv: fix buffer views on SI/CIK.

Fixes CTS dEQP-VK.memory.pipeline_barrier.host_write_uniform_texel_buffer.1024
on SI/CIK with radv.

Fixes: f4e499ec (radv: add initial non-conformant radv vulkan driver)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit ca82ef5ac75e50abb109986b55002cca24f7c0fb)

radv: fix non-0 based layer clears.

If the layer base was > 0, it wasn't getting passed as the start
instance or getting added in the shaders.

Fixes CTS dEQP-VK.api.image_clearing.core.clear_color_attachment.2d_r8_uint_multiple_layers

Fixes: 7e0382fb (radv: add support for layered clears (v2))
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 75392e76adf143070a5f208febd8da31b39b7676)

swr: remove unneeded fallback strcasecmp define

The last user of the function was removed with earlier commit.

Fixes: 50842e8a931 ("swr: replace gallium->swr format enum conversion")
Cc: Tim Rowley <timothy.o.rowley@intel.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
(cherry picked from commit a0755f2e6a1b41b2c5e295fa5ff8eb8dfbf5eb41)

i965: use strtol to convert the integer deviceID override

One can override the deviceID, by setting the INTEL_DEVID_OVERRIDE
variable. A few symbolic names or a numerical value for the actual
device ID is accepted.

At the same time we're using strtod (string to double) to convert the
string to a decimal numeral. A seeming thinko, made by the original
commit that introduces the code in libdrm_intel and got here with the
import.

Fixes: 514db96c117a ("i965: Import libdrm_intel.")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 647b5a18df6e423e1a15d92bc767ba0cf04493a3)

anv/pipeline: do not use BITFIELD64_BIT()

In the previous commit, forgot to apply v2 suggestions.

Fixes: 28d0c38 (anv/pipeline: use unsigned long long constant to check
enable vertex inputs)

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit 5cd4ece34ebdc1383f1e2376c88097d06544e2f6)

travis: lower SWR requirement to GCC 4.8, aka std=c++11

With ealier commit we relaxed the requirement from C++14 to C++11.
Update the build script so that it

Cc: Tim Rowley <timothy.o.rowley@intel.com
Fixes: 0b80b025021 ("swr: relax c++ requirement from c++14 to c++11")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 459274144dbd9227a57858316b996cede9094bca)

i965: Resolve framebuffers before signaling the fence

From KHR_fence_sync:

  When the condition of the sync object is satisfied by the fence
  command, the sync is signaled by the associated client API context,
  causing any eglClientWaitSyncKHR commands (see below) blocking on
  <sync> to unblock. The only condition currently supported is
  EGL_SYNC_PRIOR_COMMANDS_COMPLETE_KHR, which is satisfied by
  completion of the fence command corresponding to the sync object,
  and all preceding commands in the associated client API context's
  command stream. The sync object will not be signaled until all
  effects from these commands on the client API's internal and
  framebuffer state are fully realized. No other state is affected by
  execution of the fence command.

If clients are passing the fence fd (from EGL_ANDROID_native_fence_sync)
to a compositor, that fence must only be signaled once the framebuffer
is resolved and not before as is currently the case.

v2: fixup assert to use GL_SYNC_GPU_COMMANDS_COMPLETE (Chad)

Reported-by: Sergi Granell <xerpi.g.12@gmail.com>
Fixes: c636284ee8ee ("i965/sync: Implement DRI2_Fence extension")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Sergi Granell <xerpi.g.12@gmail.com>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Chad Versace <chadversary@chromium.org>
Cc: Daniel Stone <daniels@collabora.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chadversary@chromium.org>
(cherry picked from commit 618be8cc1ad1760103930b69ffbf528d7b861ab3)

bin/cherry-ignore: add radeonsi "fix of a fix"

The commit addresses an earlier fix, which did not land in branch.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

cherry-ignore: add yet another bindless textures fix

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

cherry-ignore: add "st/glsl_to_tgsi: fix getting the image type for array of structs"

Addresses commit which did not land in branch.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

cherry-ignore: add bindless textures fix

The bindless work did not land in branch.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

cherry-ignore: ignore reverted st/mesa commit

Applied to master and reverted shortly afterwords.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

cherry-ignore: add a couple of radeonsi/gfx9 commits

They depend on the merged shaders (re)work which landed past the 17.1
branchpoint.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

cherry-ignore: add "swr: fix transform feedback logic"

Explicit 17.2 nomination, since it depends on refactoring past the 17.1
branchpoint.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

cherry-ignore: add "swr/rast: non-regex knob fallback code for gcc < 4.9"

Addresses commit merged past the 17.1 brancpoint.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

cherry-ignore: add a couple of radeon commits

Both are explicit 17.2 nominations, since they depend on work which
landed past the 17.1 branchpoint.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

gallium/radeon: make S_FIXED function signed and move it to shared code

This fixes a bug uncovered by:
    2412c4c81ea0488df865817a0de91ec46e359b72
    util: Make CLAMP turn NaN into MIN.

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 433f6f7ac9ed6624fec02cc055c3bfa247dba185)

radeonsi/gfx9: reduce max threads per block to 1024 on gfx9+

The number of supported waves per thread group has been reduced to 16
with gfx9. Trying to use 32 waves causes hangs, and barriers might
not work correctly with > 16 waves.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit a0e6b9a2db5aa5f06a4f60d270aca8344e7d8b3f)
[Emil Velikov: add a HAVE_LLVM check, as applicable in branch]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/gallium/drivers/radeon/r600_pipe_common.c

radeonsi: fix detection of DRAW_INDIRECT_MULTI on SI

The firmware version numbers for SI were wrong. The new numbers are probably
too conservative (we don't have a definitive answer by the firmware team),
but DRAW_INDIRECT_MULTI has been confirmed to work with these versions on
Tahiti (by Gustaw) and on Verde (by myself).

While this is technically adding a feature, it's a feature we thought we had
for a long time. The change is small enough and we're early enough in the 17.2
release cycle that it should still go in.

Reported-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 65fbaab0b74b6b5a2ac483d48beeefa0a29ff15e)

anv: only expose up to 28 vertex attributes

The EU limit of 128 GRFs should allow 32 vertex elements of 4 GRFs.
However, the maximum allowed value of "Vertex URB Entry Read Length"
in SIMD8 is 15. And 15 * 8 = 120 gives us a limit of 30 vertex elements.
Because we also need to reserve a vertex buffer to upload
VertexIndex/InstanceIndex and another to upload DrawID when needed,
we can only expose 28.

Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 31f1863ace73d31a579e5c36252a957818ad09cf)

anv/cmd_buffer: fix off by one error in assertion

Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit a848e693efc8e2a1d355dc1076409968b374153f)

cherry-ignore: add "i965: Fix = vs == in MCS aux usage assert."

Addesses 0f9b609cf4f, which landed shortly before the 17.2 branchpoint.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

cherry-ignore: add "i965: Fix offset addition in get_isl_surf"

Addesses 63a43f41619, which landed shortly before the 17.2 branchpoint.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

i965: perf: flush batchbuffers at the beginning of queries

As Chris commented, it makes more sense to have batch buffer flushes
before the query. Usually applications like frame_retrace do a series
of queries and in that case, with flushes at the end of the queries,
we might still have the first query contained in 2 different batchs.
More generally it would be quite usual to have the query contained in
2 batch buffers because we never now what's the fill rate of the
current batch buffer.

If we move the flushing at the beginning of the queries, it's pretty
much guaranteed that queries will be contained in a single batch
buffer (unless the amount of commands is huge, but then it's only fair
to include reloading request times in the measurements).

Fixes: adafe4b733c02 ("i965: perf: minimize the chances to spread queries across batchbuffers")
Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "17.2 17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 9f439ae1201cb049ffedb9b0e2d4f393fb0a761e)

broadcom/vc4: Prefer blit via rendering to the software fallback.

I don't know how I managed to leave this here for so long.  Found when
working on a 1:1 overlapping blit extension for X11.

Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 93fec49a75ce799bb6fe167f9409fd553a5781c6)

etnaviv: Clear lbl_usage array correctly

Fill the entire array instead of just a quarter. This avoids
crashes with large shaders.
(currently this never causes a problem because shaders larger than 2048/4
instructions are not supported by this driver on any hardware, but it will
cause problems in the future)

Fixes: ec436051899 ("etnaviv: fix shader miscompilation with more than 16 labels")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit 15a1ceb127b70ac98b03cae051927f75fb7ee204)

swr: don't forget to link AVX/AVX2 against pthreads

Seems like the backends have been using pthreads since day one, yet
we've been missing the link.

With later commit we'll fix a typo, hence the libraries will be build
with -Wl,no-undefined, aka failing the build on unresolved symbols.

v2: Split from a larger patch.

Cc: mesa-stable@lists.freedesktop.org
Cc: Bruce Cherniak <bruce.cherniak@intel.com>
Cc: Tim Rowley <timothy.o.rowley@intel.com>
Cc: Laurent Carlier <lordheavym@gmail.com>
Fixes: c6e67f5a9373e916a8d2 "gallium/swr: add OpenSWR rasterizer"
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 33d397ada50a1d1f485205e847003dc48146ec19)
[Emil Velikov: add PTHREAD_LIBS to COMMON_LIBADD]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/gallium/drivers/swr/Makefile.am

cherry-ignore: add "anv: Transition MCS buffers from the undefined layout"

Depends on earlier refactoring commit 6235f08ff8870636d89d2181e0a9dfc3ebec7b45

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

swr/rast: quit using linux-specific gettid()

Linux-specific gettid() syscall shouldn't be used in portable code.
Fix does assume a 1:1 thread:LWP architecture, but works for our
current target platforms and can be revisited later if needed.

Fixes unresolved symbol in linux scons builds.

v2: add comment in code about the 1:1 assumption.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
(cherry picked from commit d1e7153228304eb1be85580cbfdea1a57c5f203b)

gallium/util: fix nondeterministic avx512 detection

cpuid.7 requires cx=0 to select the extended feature leaf.

avx512 detection was using the non-indexed cpuid resulting
in random non-detection of avx512.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
(cherry picked from commit 131b9f644cbe70728ba02878483e22459400bcb4)

anv/image: Fix VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT

We incorrectly detected VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT.  We looked
for the bit in VkImageCreateInfo::usage, but it's actually in
VkImageCreateInfo::flags.

Found by assertion failures while enabling VK_ANDROID_native_buffer.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 5d6905211355464de4885492511e5f9d936cc058)