#ifdef DRV_AMDGPU
extern const struct backend backend_amdgpu;
#endif
-extern const struct backend backend_evdi;
#ifdef DRV_EXYNOS
extern const struct backend backend_exynos;
#endif
#ifdef DRV_I915
extern const struct backend backend_i915;
#endif
-#ifdef DRV_MARVELL
-extern const struct backend backend_marvell;
-#endif
#ifdef DRV_MEDIATEK
extern const struct backend backend_mediatek;
#endif
-#ifdef DRV_MESON
-extern const struct backend backend_meson;
-#endif
#ifdef DRV_MSM
extern const struct backend backend_msm;
#endif
-extern const struct backend backend_nouveau;
-#ifdef DRV_RADEON
-extern const struct backend backend_radeon;
-#endif
#ifdef DRV_ROCKCHIP
extern const struct backend backend_rockchip;
#endif
#ifdef DRV_TEGRA
extern const struct backend backend_tegra;
#endif
-extern const struct backend backend_udl;
#ifdef DRV_VC4
extern const struct backend backend_vc4;
#endif
-extern const struct backend backend_vgem;
+
+#ifndef DRI_GENERIC_DRV
+// Dumb / generic drivers
+extern const struct backend backend_evdi;
+extern const struct backend backend_marvell;
+extern const struct backend backend_meson;
+extern const struct backend backend_nouveau;
+extern const struct backend backend_komeda;
+extern const struct backend backend_radeon;
+extern const struct backend backend_synaptics;
extern const struct backend backend_virtio_gpu;
+extern const struct backend backend_udl;
+extern const struct backend backend_vkms;
+#endif
+
+#ifdef DRI_GENERIC_DRV
+extern const struct backend backend_dri_generic;
+#endif
static const struct backend *drv_get_backend(int fd)
{
#ifdef DRV_AMDGPU
&backend_amdgpu,
#endif
- &backend_evdi,
#ifdef DRV_EXYNOS
&backend_exynos,
#endif
#ifdef DRV_I915
&backend_i915,
#endif
-#ifdef DRV_MARVELL
- &backend_marvell,
-#endif
#ifdef DRV_MEDIATEK
&backend_mediatek,
#endif
-#ifdef DRV_MESON
- &backend_meson,
-#endif
#ifdef DRV_MSM
&backend_msm,
#endif
- &backend_nouveau,
-#ifdef DRV_RADEON
- &backend_radeon,
-#endif
#ifdef DRV_ROCKCHIP
&backend_rockchip,
#endif
-#ifdef DRV_TEGRA
- &backend_tegra,
-#endif
- &backend_udl,
#ifdef DRV_VC4
&backend_vc4,
#endif
- &backend_vgem, &backend_virtio_gpu,
+#ifndef DRI_GENERIC_DRV
+ &backend_evdi, &backend_marvell, &backend_meson, &backend_nouveau,
+ &backend_komeda, &backend_radeon, &backend_synaptics, &backend_virtio_gpu,
+ &backend_udl, &backend_virtio_gpu, &backend_vkms
+#endif
};
for (i = 0; i < ARRAY_SIZE(backend_list); i++) {
return NULL;
}
-struct driver *drv_create(int fd)
+struct driver *drv_create(int fd, bool try_generic)
{
struct driver *drv;
int ret;
if (!drv)
return NULL;
+ char *minigbm_debug;
+ minigbm_debug = getenv("MINIGBM_DEBUG");
+ drv->compression = (minigbm_debug == NULL) || (strcmp(minigbm_debug, "nocompression") != 0);
+
drv->fd = fd;
drv->backend = drv_get_backend(fd);
+#ifdef DRI_GENERIC_DRV
+ if (!drv->backend && try_generic)
+ drv->backend = &backend_dri_generic;
+#endif
+
if (!drv->backend)
goto free_driver;
if (drv->backend->bo_compute_metadata) {
ret = drv->backend->bo_compute_metadata(bo, width, height, format, use_flags, NULL,
0);
- if (!is_test_alloc && ret == 0) {
+ if (!is_test_alloc && ret == 0)
ret = drv->backend->bo_create_from_metadata(bo);
- if (ret == 0)
- return bo;
- }
} else if (!is_test_alloc) {
ret = drv->backend->bo_create(bo, width, height, format, use_flags);
}
{
uint32_t i;
uint8_t *addr;
- struct mapping mapping;
+ struct mapping mapping = { 0 };
assert(rect->width >= 0);
assert(rect->height >= 0);
return MAP_FAILED;
}
- memset(&mapping, 0, sizeof(mapping));
mapping.rect = *rect;
mapping.refcount = 1;
return ret;
}
+int drv_bo_flush(struct bo *bo, struct mapping *mapping)
+{
+ int ret = 0;
+
+ assert(mapping);
+ assert(mapping->vma);
+ assert(mapping->refcount > 0);
+ assert(mapping->vma->refcount > 0);
+
+ if (bo->drv->backend->bo_flush)
+ ret = bo->drv->backend->bo_flush(bo, mapping);
+
+ return ret;
+}
+
int drv_bo_flush_or_unmap(struct bo *bo, struct mapping *mapping)
{
int ret = 0;
return -EINVAL;
}
+ if (bo->drv->backend->bo_get_plane_fd) {
+ fd = bo->drv->backend->bo_get_plane_fd(bo, plane);
+
+ if (fd >= 0)
+ return fd;
+ }
+
ret = drmPrimeHandleToFD(bo->drv->fd, bo->handles[plane].u32, DRM_CLOEXEC | DRM_RDWR, &fd);
// Older DRM implementations blocked DRM_RDWR, but gave a read/write mapping anyways
return bo->meta.format;
}
+size_t drv_bo_get_total_size(struct bo *bo)
+{
+ return bo->meta.total_size;
+}
+
uint32_t drv_resolve_format(struct driver *drv, uint32_t format, uint64_t use_flags)
{
if (drv->backend->resolve_format)
#endif
va_end(args);
}
+
+int drv_resource_info(struct bo *bo, uint32_t strides[DRV_MAX_PLANES],
+ uint32_t offsets[DRV_MAX_PLANES])
+{
+ for (uint32_t plane = 0; plane < bo->meta.num_planes; plane++) {
+ strides[plane] = bo->meta.strides[plane];
+ offsets[plane] = bo->meta.offsets[plane];
+ }
+
+ if (bo->drv->backend->resource_info)
+ return bo->drv->backend->resource_info(bo, strides, offsets);
+
+ return 0;
+}