resolve merge conflicts of 42ca6159e52c5a2217825da02a26cf504998301b to stage-aosp...

[android-x86/external-minigbm.git] / i915.c

diff --git a/i915.c b/i915.c
index e8c4909..6fc59eb 100644 (file)
--- a/i915.c
+++ b/i915.c
@@ -57,7 +57,9 @@ static uint32_t i915_get_gen(int device_id)
        const uint16_t gen3_ids[] = { 0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
                                      0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011 };
        const uint16_t gen11_ids[] = { 0x4E71, 0x4E61, 0x4E51, 0x4E55, 0x4E57 };
-
+       const uint16_t gen12_ids[] = { 0x9A40, 0x9A49, 0x9A59, 0x9A60, 0x9A68,
+                                       0x9A70, 0x9A78, 0x9AC0, 0x9AC9, 0x9AD9, 
+                                       0x9AF8 };
        unsigned i;
        for (i = 0; i < ARRAY_SIZE(gen3_ids); i++)
                if (gen3_ids[i] == device_id)
@@ -67,6 +69,11 @@ static uint32_t i915_get_gen(int device_id)
                if (gen11_ids[i] == device_id)
                        return 11;
 
+       /* Gen 12 */
+       for (i = 0; i < ARRAY_SIZE(gen12_ids); i++)
+               if (gen12_ids[i] == device_id)
+                       return 12;
+
        return 4;
 }
 
@@ -95,8 +102,8 @@ static int i915_add_combinations(struct driver *drv)
        scanout_and_render = BO_USE_RENDER_MASK | BO_USE_SCANOUT;
        render = BO_USE_RENDER_MASK;
        texture_only = BO_USE_TEXTURE_MASK;
-       uint64_t linear_mask = BO_USE_RENDERSCRIPT | BO_USE_LINEAR | BO_USE_PROTECTED |
-                              BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN;
+       uint64_t linear_mask =
+           BO_USE_RENDERSCRIPT | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN;
 
        metadata.tiling = I915_TILING_NONE;
        metadata.priority = 1;
@@ -234,13 +241,12 @@ static int i915_init(struct driver *drv)
        int ret;
        int device_id;
        struct i915_device *i915;
-       drm_i915_getparam_t get_param;
+       drm_i915_getparam_t get_param = { 0 };
 
        i915 = calloc(1, sizeof(*i915));
        if (!i915)
                return -ENOMEM;
 
-       memset(&get_param, 0, sizeof(get_param));
        get_param.param = I915_PARAM_CHIPSET_ID;
        get_param.value = &device_id;
        ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
@@ -303,7 +309,7 @@ static int i915_bo_compute_metadata(struct bo *bo, uint32_t width, uint32_t heig
 {
        uint64_t modifier;
        struct i915_device *i915 = bo->drv->priv;
-       bool huge_bo = (i915->gen <= 11) && (width > 4096);
+       bool huge_bo = (i915->gen < 11) && (width > 4096);
 
        if (modifiers) {
                modifier =
@@ -407,12 +413,10 @@ static int i915_bo_create_from_metadata(struct bo *bo)
 {
        int ret;
        size_t plane;
-       struct drm_i915_gem_create gem_create;
-       struct drm_i915_gem_set_tiling gem_set_tiling;
+       struct drm_i915_gem_create gem_create = { 0 };
+       struct drm_i915_gem_set_tiling gem_set_tiling = { 0 };
 
-       memset(&gem_create, 0, sizeof(gem_create));
        gem_create.size = bo->meta.total_size;
-
        ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
        if (ret) {
                drv_log("DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n", gem_create.size);
@@ -422,15 +426,13 @@ static int i915_bo_create_from_metadata(struct bo *bo)
        for (plane = 0; plane < bo->meta.num_planes; plane++)
                bo->handles[plane].u32 = gem_create.handle;
 
-       memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
        gem_set_tiling.handle = bo->handles[0].u32;
        gem_set_tiling.tiling_mode = bo->meta.tiling;
        gem_set_tiling.stride = bo->meta.strides[0];
 
        ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling);
        if (ret) {
-               struct drm_gem_close gem_close;
-               memset(&gem_close, 0, sizeof(gem_close));
+               struct drm_gem_close gem_close = { 0 };
                gem_close.handle = bo->handles[0].u32;
                drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
 
@@ -450,14 +452,13 @@ static void i915_close(struct driver *drv)
 static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
 {
        int ret;
-       struct drm_i915_gem_get_tiling gem_get_tiling;
+       struct drm_i915_gem_get_tiling gem_get_tiling = { 0 };
 
        ret = drv_prime_bo_import(bo, data);
        if (ret)
                return ret;
 
        /* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
-       memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
        gem_get_tiling.handle = bo->handles[0].u32;
 
        ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling);
@@ -480,9 +481,7 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t
                return MAP_FAILED;
 
        if (bo->meta.tiling == I915_TILING_NONE) {
-               struct drm_i915_gem_mmap gem_map;
-               memset(&gem_map, 0, sizeof(gem_map));
-
+               struct drm_i915_gem_mmap gem_map = { 0 };
                /* TODO(b/118799155): We don't seem to have a good way to
                 * detect the use cases for which WC mapping is really needed.
                 * The current heuristic seems overly coarse and may be slowing
@@ -508,11 +507,9 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t
 
                addr = (void *)(uintptr_t)gem_map.addr_ptr;
        } else {
-               struct drm_i915_gem_mmap_gtt gem_map;
-               memset(&gem_map, 0, sizeof(gem_map));
+               struct drm_i915_gem_mmap_gtt gem_map = { 0 };
 
                gem_map.handle = bo->handles[0].u32;
-
                ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
                if (ret) {
                        drv_log("DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
@@ -535,9 +532,8 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t
 static int i915_bo_invalidate(struct bo *bo, struct mapping *mapping)
 {
        int ret;
-       struct drm_i915_gem_set_domain set_domain;
+       struct drm_i915_gem_set_domain set_domain = { 0 };
 
-       memset(&set_domain, 0, sizeof(set_domain));
        set_domain.handle = bo->handles[0].u32;
        if (bo->meta.tiling == I915_TILING_NONE) {
                set_domain.read_domains = I915_GEM_DOMAIN_CPU;