#include "helpers.h"
#include "util.h"
-static const uint32_t tileable_formats[] = { DRM_FORMAT_ARGB1555, DRM_FORMAT_ABGR8888,
- DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565,
- DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555,
- DRM_FORMAT_XRGB8888, DRM_FORMAT_UYVY,
- DRM_FORMAT_YUYV };
+#define I915_CACHELINE_SIZE 64
+#define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1)
-static const uint32_t linear_only_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_R8, DRM_FORMAT_YVU420,
- DRM_FORMAT_YVU420_ANDROID };
+static const uint32_t render_target_formats[] = { DRM_FORMAT_ARGB1555, DRM_FORMAT_ABGR8888,
+ DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565,
+ DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555,
+ DRM_FORMAT_XRGB8888 };
+
+static const uint32_t tileable_texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_NV12,
+ DRM_FORMAT_R8, DRM_FORMAT_UYVY,
+ DRM_FORMAT_YUYV };
+
+static const uint32_t texture_source_formats[] = { DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID };
struct i915_device {
- int gen;
+ uint32_t gen;
+ int32_t has_llc;
};
-static int get_gen(int device_id)
+static uint32_t i915_get_gen(int device_id)
{
const uint16_t gen3_ids[] = { 0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011 };
*/
for (i = 0; i < drv->backend->combos.size; i++) {
combo = &drv->backend->combos.data[i];
- if (combo->format == item->format) {
- if ((combo->metadata.tiling == I915_TILING_Y &&
- item->modifier == I915_FORMAT_MOD_Y_TILED) ||
- (combo->metadata.tiling == I915_TILING_X &&
- item->modifier == I915_FORMAT_MOD_X_TILED)) {
- combo->metadata.modifier = item->modifier;
- combo->usage |= item->usage;
- } else if (combo->metadata.tiling != I915_TILING_Y) {
- combo->usage |= item->usage;
- }
+ if (combo->format != item->format)
+ continue;
+
+ if (item->modifier == DRM_FORMAT_MOD_NONE &&
+ combo->metadata.tiling == I915_TILING_X) {
+ /*
+ * FIXME: drv_query_kms() does not report the available modifiers
+ * yet, but we know that all hardware can scanout from X-tiled
+ * buffers, so let's add this to our combinations, except for
+ * cursor, which must not be tiled.
+ */
+ combo->usage |= item->usage & ~BO_USE_CURSOR;
}
+
+ if (combo->metadata.modifier == item->modifier)
+ combo->usage |= item->usage;
}
return 0;
uint32_t i, num_items;
struct kms_item *items;
struct format_metadata metadata;
- uint64_t flags = BO_COMMON_USE_MASK;
+ uint64_t render_flags, texture_flags;
+
+ render_flags = BO_USE_RENDER_MASK;
+ texture_flags = BO_USE_TEXTURE_MASK;
metadata.tiling = I915_TILING_NONE;
metadata.priority = 1;
metadata.modifier = DRM_FORMAT_MOD_NONE;
- ret = drv_add_combinations(drv, linear_only_formats, ARRAY_SIZE(linear_only_formats),
- &metadata, flags);
+ ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
+ &metadata, render_flags);
+ if (ret)
+ return ret;
+
+ ret = drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
+ &metadata, texture_flags);
if (ret)
return ret;
- ret = drv_add_combinations(drv, tileable_formats, ARRAY_SIZE(tileable_formats), &metadata,
- flags);
+ ret = drv_add_combinations(drv, tileable_texture_source_formats,
+ ARRAY_SIZE(tileable_texture_source_formats), &metadata,
+ texture_flags);
if (ret)
return ret;
drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
- flags &= ~BO_USE_SW_WRITE_OFTEN;
- flags &= ~BO_USE_SW_READ_OFTEN;
- flags &= ~BO_USE_LINEAR;
+ /* IPU3 camera ISP supports only NV12 output. */
+ drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
+ BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
+ /*
+ * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
+ * from camera.
+ */
+ drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
+ BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
+
+ render_flags &= ~BO_USE_RENDERSCRIPT;
+ render_flags &= ~BO_USE_SW_WRITE_OFTEN;
+ render_flags &= ~BO_USE_SW_READ_OFTEN;
+ render_flags &= ~BO_USE_LINEAR;
+
+ texture_flags &= ~BO_USE_RENDERSCRIPT;
+ texture_flags &= ~BO_USE_SW_WRITE_OFTEN;
+ texture_flags &= ~BO_USE_SW_READ_OFTEN;
+ texture_flags &= ~BO_USE_LINEAR;
metadata.tiling = I915_TILING_X;
metadata.priority = 2;
+ metadata.modifier = I915_FORMAT_MOD_X_TILED;
+
+ ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
+ &metadata, render_flags);
+ if (ret)
+ return ret;
- ret = drv_add_combinations(drv, tileable_formats, ARRAY_SIZE(tileable_formats), &metadata,
- flags);
+ ret = drv_add_combinations(drv, tileable_texture_source_formats,
+ ARRAY_SIZE(tileable_texture_source_formats), &metadata,
+ texture_flags);
if (ret)
return ret;
metadata.tiling = I915_TILING_Y;
metadata.priority = 3;
+ metadata.modifier = I915_FORMAT_MOD_Y_TILED;
- ret = drv_add_combinations(drv, tileable_formats, ARRAY_SIZE(tileable_formats), &metadata,
- flags);
+ ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
+ &metadata, render_flags);
+ if (ret)
+ return ret;
+
+ ret = drv_add_combinations(drv, tileable_texture_source_formats,
+ ARRAY_SIZE(tileable_texture_source_formats), &metadata,
+ texture_flags);
if (ret)
return ret;
break;
}
+ /*
+ * The alignment calculated above is based on the full size luma plane and to have chroma
+ * planes properly aligned with subsampled formats, we need to multiply luma alignment by
+ * subsampling factor.
+ */
+ switch (bo->format) {
+ case DRM_FORMAT_YVU420_ANDROID:
+ case DRM_FORMAT_YVU420:
+ horizontal_alignment *= 2;
+ /* Fall through */
+ case DRM_FORMAT_NV12:
+ vertical_alignment *= 2;
+ break;
+ }
+
*aligned_height = ALIGN(bo->height, vertical_alignment);
if (i915->gen > 3) {
*stride = ALIGN(*stride, horizontal_alignment);
return 0;
}
+static void i915_clflush(void *start, size_t size)
+{
+ void *p = (void *)(((uintptr_t)start) & ~I915_CACHELINE_MASK);
+ void *end = (void *)((uintptr_t)start + size);
+
+ __builtin_ia32_mfence();
+ while (p < end) {
+ __builtin_ia32_clflush(p);
+ p = (void *)((uintptr_t)p + I915_CACHELINE_SIZE);
+ }
+}
+
static int i915_init(struct driver *drv)
{
int ret;
get_param.value = &device_id;
ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
if (ret) {
- fprintf(stderr, "drv: DRM_IOCTL_I915_GETPARAM failed\n");
+ fprintf(stderr, "drv: Failed to get I915_PARAM_CHIPSET_ID\n");
+ free(i915);
+ return -EINVAL;
+ }
+
+ i915->gen = i915_get_gen(device_id);
+
+ memset(&get_param, 0, sizeof(get_param));
+ get_param.param = I915_PARAM_HAS_LLC;
+ get_param.value = &i915->has_llc;
+ ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
+ if (ret) {
+ fprintf(stderr, "drv: Failed to get I915_PARAM_HAS_LLC\n");
free(i915);
return -EINVAL;
}
- i915->gen = get_gen(device_id);
drv->priv = i915;
return i915_add_combinations(drv);
uint32_t stride;
struct drm_i915_gem_create gem_create;
struct drm_i915_gem_set_tiling gem_set_tiling;
+ struct combination *combo;
+
+ combo = drv_get_combination(bo->drv, format, flags);
+ if (!combo)
+ return -EINVAL;
- if (flags & (BO_USE_CURSOR | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN))
- bo->tiling = I915_TILING_NONE;
- else if (flags & BO_USE_SCANOUT)
- bo->tiling = I915_TILING_X;
- else
- bo->tiling = I915_TILING_Y;
+ bo->tiling = combo->metadata.tiling;
stride = drv_stride_from_format(format, width, 0);
- /*
- * Align the Y plane to 128 bytes so the chroma planes would be aligned
- * to 64 byte boundaries. This is an Intel HW requirement.
- */
- if (format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID) {
- stride = ALIGN(stride, 128);
- bo->tiling = I915_TILING_NONE;
- }
ret = i915_align_dimensions(bo, bo->tiling, &stride, &height);
if (ret)
return ret;
- drv_bo_from_format(bo, stride, height, format);
+ /*
+ * HAL_PIXEL_FORMAT_YV12 requires the buffer height not be aligned, but we need to keep
+ * total size as with aligned height to ensure enough padding space after each plane to
+ * satisfy GPU alignment requirements.
+ *
+ * We do it by first calling drv_bo_from_format() with aligned height and
+ * DRM_FORMAT_YVU420, which allows height alignment, saving the total size it calculates
+ * and then calling it again with requested parameters.
+ *
+ * This relies on the fact that i965 driver uses separate surfaces for each plane and
+ * contents of padding bytes is not affected, as it is only used to satisfy GPU cache
+ * requests.
+ *
+ * This is enforced by Mesa in src/intel/isl/isl_gen8.c, inside
+ * isl_gen8_choose_image_alignment_el(), which is used for GEN9 and GEN8.
+ */
+ if (format == DRM_FORMAT_YVU420_ANDROID) {
+ uint32_t unaligned_height = bo->height;
+ size_t total_size;
+
+ drv_bo_from_format(bo, stride, height, DRM_FORMAT_YVU420);
+ total_size = bo->total_size;
+ drv_bo_from_format(bo, stride, unaligned_height, format);
+ bo->total_size = total_size;
+ } else {
+ drv_bo_from_format(bo, stride, height, format);
+ }
+
+ /*
+ * Quoting Mesa ISL library:
+ *
+ * - For linear surfaces, additional padding of 64 bytes is required at
+ * the bottom of the surface. This is in addition to the padding
+ * required above.
+ */
+ if (bo->tiling == I915_TILING_NONE)
+ bo->total_size += 64;
memset(&gem_create, 0, sizeof(gem_create));
gem_create.size = bo->total_size;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling);
if (ret) {
+ drv_gem_bo_destroy(bo);
fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_GET_TILING failed.");
return ret;
}
return 0;
}
-static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane)
+static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane, int prot)
{
int ret;
void *addr;
return MAP_FAILED;
}
- addr = mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED, bo->drv->fd,
- gem_map.offset);
-
+ addr = mmap(0, bo->total_size, prot, MAP_SHARED, bo->drv->fd, gem_map.offset);
set_domain.read_domains = I915_GEM_DOMAIN_GTT;
set_domain.write_domain = I915_GEM_DOMAIN_GTT;
}
static int i915_bo_unmap(struct bo *bo, struct map_info *data)
{
- if (bo->tiling == I915_TILING_NONE) {
- int ret;
- struct drm_i915_gem_sw_finish sw_finish;
- memset(&sw_finish, 0, sizeof(sw_finish));
-
- sw_finish.handle = bo->handles[0].u32;
- ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SW_FINISH, &sw_finish);
- if (ret) {
- fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SW_FINISH failed\n");
- return ret;
- }
- }
+ struct i915_device *i915 = bo->drv->priv;
+ if (!i915->has_llc && bo->tiling == I915_TILING_NONE)
+ i915_clflush(data->addr, data->length);
return munmap(data->addr, data->length);
}
-static uint32_t i915_resolve_format(uint32_t format)
+static uint32_t i915_resolve_format(uint32_t format, uint64_t usage)
{
switch (format) {
case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
+ /* KBL camera subsystem requires NV12. */
+ if (usage & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
+ return DRM_FORMAT_NV12;
/*HACK: See b/28671744 */
return DRM_FORMAT_XBGR8888;
case DRM_FORMAT_FLEX_YCbCr_420_888:
- return DRM_FORMAT_YVU420_ANDROID;
+ /* KBL camera subsystem requires NV12. */
+ if (usage & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
+ return DRM_FORMAT_NV12;
+ return DRM_FORMAT_YVU420;
default:
return format;
}
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