+ uint32_t i, num_items;
+ struct kms_item *items;
+ struct format_metadata metadata;
+
+ metadata.tiling = 0;
+ metadata.priority = 1;
+ metadata.modifier = DRM_FORMAT_MOD_LINEAR;
+
+ ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
+ &metadata, BO_USE_RENDER_MASK);
+ if (ret)
+ return ret;
+
+ ret = drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
+ &metadata, BO_USE_TEXTURE_MASK);
+ if (ret)
+ return ret;
+
+ drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
+ drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
+
+ /* Camera ISP supports only NV12 output. */
+ drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
+ BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
+ /*
+ * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
+ * from camera.
+ */
+ drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
+ BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
+
+ items = drv_query_kms(drv, &num_items);
+ if (!items || !num_items)
+ return 0;
+
+ for (i = 0; i < num_items; i++) {
+ ret = rockchip_add_kms_item(drv, &items[i]);
+ if (ret) {
+ free(items);
+ return ret;
+ }
+ }
+
+ free(items);
+ return 0;
+}
+
+static bool has_modifier(const uint64_t *list, uint32_t count, uint64_t modifier)
+{
+ uint32_t i;
+ for (i = 0; i < count; i++)
+ if (list[i] == modifier)
+ return true;
+
+ return false;
+}
+
+static int rockchip_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height,
+ uint32_t format, const uint64_t *modifiers,
+ uint32_t count)
+{
+ int ret;
+ size_t plane;
+ struct drm_rockchip_gem_create gem_create;
+
+ if (format == DRM_FORMAT_NV12) {
+ uint32_t w_mbs = DIV_ROUND_UP(ALIGN(width, 16), 16);
+ uint32_t h_mbs = DIV_ROUND_UP(ALIGN(height, 16), 16);
+
+ uint32_t aligned_width = w_mbs * 16;
+ uint32_t aligned_height = DIV_ROUND_UP(h_mbs * 16 * 3, 2);
+
+ drv_bo_from_format(bo, aligned_width, height, format);
+ bo->total_size = bo->strides[0] * aligned_height + w_mbs * h_mbs * 128;
+ } else if (width <= 2560 &&
+ has_modifier(modifiers, count, DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC)) {
+ /* If the caller has decided they can use AFBC, always
+ * pick that */
+ afbc_bo_from_format(bo, width, height, format);
+ } else {
+ if (!has_modifier(modifiers, count, DRM_FORMAT_MOD_LINEAR)) {
+ errno = EINVAL;
+ fprintf(stderr, "no usable modifier found\n");
+ return -1;
+ }
+
+ uint32_t stride;
+ /*
+ * Since the ARM L1 cache line size is 64 bytes, align to that
+ * as a performance optimization. For YV12, the Mali cmem allocator
+ * requires that chroma planes are aligned to 64-bytes, so align the
+ * luma plane to 128 bytes.
+ */
+ stride = drv_stride_from_format(format, width, 0);
+ if (format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID)
+ stride = ALIGN(stride, 128);
+ else
+ stride = ALIGN(stride, 64);
+
+ drv_bo_from_format(bo, stride, height, format);
+ }