#include <stdio.h>
#include <string.h>
#include <sys/mman.h>
-#include <xf86drm.h>
#include <tegra_drm.h>
+#include <xf86drm.h>
#include "drv_priv.h"
#include "helpers.h"
#define NV_DEFAULT_BLOCK_HEIGHT_LOG2 4
#define NV_PREFERRED_PAGE_SIZE (128 * 1024)
+// clang-format off
enum nv_mem_kind
{
NV_MEM_KIND_PITCH = 0,
TEGRA_READ_TILED_BUFFER = 0,
TEGRA_WRITE_TILED_BUFFER = 1,
};
+// clang-format on
struct tegra_private_map_data {
void *tiled;
void *untiled;
};
-static const uint32_t supported_formats[] = {
- DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB8888
-};
+static const uint32_t supported_formats[] = { DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB8888 };
static int compute_block_height_log2(int height)
{
return block_height_log2;
}
-static void compute_layout_blocklinear(int width, int height, int format,
- enum nv_mem_kind *kind,
- uint32_t *block_height_log2,
- uint32_t *stride, uint32_t *size)
+static void compute_layout_blocklinear(int width, int height, int format, enum nv_mem_kind *kind,
+ uint32_t *block_height_log2, uint32_t *stride,
+ uint32_t *size)
{
int pitch = drv_stride_from_format(format, width, 0);
/* Compute padded height. */
*block_height_log2 = compute_block_height_log2(height);
int block_height = 1 << *block_height_log2;
- int padded_height =
- ALIGN(height, NV_BLOCKLINEAR_GOB_HEIGHT * block_height);
+ int padded_height = ALIGN(height, NV_BLOCKLINEAR_GOB_HEIGHT * block_height);
int bytes = pitch * padded_height;
*size = bytes;
}
-static void compute_layout_linear(int width, int height, int format,
- uint32_t *stride, uint32_t *size)
+static void compute_layout_linear(int width, int height, int format, uint32_t *stride,
+ uint32_t *size)
{
*stride = ALIGN(drv_stride_from_format(format, width, 0), 64);
*size = *stride * height;
}
-static void transfer_tile(struct bo *bo, uint8_t *tiled, uint8_t *untiled,
- enum tegra_map_type type, uint32_t bytes_per_pixel,
- uint32_t gob_top, uint32_t gob_left,
+static void transfer_tile(struct bo *bo, uint8_t *tiled, uint8_t *untiled, enum tegra_map_type type,
+ uint32_t bytes_per_pixel, uint32_t gob_top, uint32_t gob_left,
uint32_t gob_size_pixels)
{
uint8_t *tmp;
}
}
-static void transfer_tiled_memory(struct bo *bo, uint8_t *tiled,
- uint8_t *untiled, enum tegra_map_type type)
+static void transfer_tiled_memory(struct bo *bo, uint8_t *tiled, uint8_t *untiled,
+ enum tegra_map_type type)
{
- uint32_t gob_width, gob_height, gob_size_bytes, gob_size_pixels,
- gob_count_x, gob_count_y, gob_top, gob_left;
+ uint32_t gob_width, gob_height, gob_size_bytes, gob_size_pixels, gob_count_x, gob_count_y,
+ gob_top, gob_left;
uint32_t i, j, offset;
uint8_t *tmp;
uint32_t bytes_per_pixel = drv_stride_from_format(bo->format, 1, 0);
* where 0 <= n <= 4.
*/
gob_width = DIV_ROUND_UP(NV_BLOCKLINEAR_GOB_WIDTH, bytes_per_pixel);
- gob_height = NV_BLOCKLINEAR_GOB_HEIGHT *
- (1 << NV_DEFAULT_BLOCK_HEIGHT_LOG2);
+ gob_height = NV_BLOCKLINEAR_GOB_HEIGHT * (1 << NV_DEFAULT_BLOCK_HEIGHT_LOG2);
/* Calculate the height from maximum possible gob height */
- while (gob_height > NV_BLOCKLINEAR_GOB_HEIGHT
- && gob_height >= 2 * bo->height)
+ while (gob_height > NV_BLOCKLINEAR_GOB_HEIGHT && gob_height >= 2 * bo->height)
gob_height /= 2;
gob_size_bytes = gob_height * NV_BLOCKLINEAR_GOB_WIDTH;
tmp = tiled + offset;
gob_left = i * gob_width;
- transfer_tile(bo, tmp, untiled, type, bytes_per_pixel,
- gob_top, gob_left, gob_size_pixels);
+ transfer_tile(bo, tmp, untiled, type, bytes_per_pixel, gob_top, gob_left,
+ gob_size_pixels);
offset += gob_size_bytes;
}
metadata.priority = 1;
metadata.modifier = DRM_FORMAT_MOD_NONE;
- ret = drv_add_combinations(drv, supported_formats,
- ARRAY_SIZE(supported_formats), &metadata,
+ ret = drv_add_combinations(drv, supported_formats, ARRAY_SIZE(supported_formats), &metadata,
flags);
if (ret)
return ret;
- drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata,
- BO_USE_CURSOR | BO_USE_SCANOUT);
- drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata,
- BO_USE_CURSOR | BO_USE_SCANOUT);
+ drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
+ drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
flags &= ~BO_USE_SW_WRITE_OFTEN;
flags &= ~BO_USE_SW_READ_OFTEN;
metadata.tiling = NV_MEM_KIND_C32_2CRA;
metadata.priority = 2;
- ret = drv_add_combinations(drv, supported_formats,
- ARRAY_SIZE(supported_formats), &metadata,
+ ret = drv_add_combinations(drv, supported_formats, ARRAY_SIZE(supported_formats), &metadata,
flags);
if (ret)
return ret;
- drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata,
- BO_USE_SCANOUT);
- drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata,
- BO_USE_SCANOUT);
+ drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_SCANOUT);
+ drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_SCANOUT);
return 0;
}
-static int tegra_bo_create(struct bo *bo, uint32_t width, uint32_t height,
- uint32_t format, uint32_t flags)
+static int tegra_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
+ uint32_t flags)
{
uint32_t size, stride, block_height_log2 = 0;
enum nv_mem_kind kind = NV_MEM_KIND_PITCH;
struct drm_tegra_gem_create gem_create;
int ret;
- if (flags & (BO_USE_CURSOR | BO_USE_LINEAR |
- BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN))
+ if (flags & (BO_USE_CURSOR | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN))
compute_layout_linear(width, height, format, &stride, &size);
else
- compute_layout_blocklinear(width, height, format, &kind,
- &block_height_log2, &stride, &size);
+ compute_layout_blocklinear(width, height, format, &kind, &block_height_log2,
+ &stride, &size);
memset(&gem_create, 0, sizeof(gem_create));
gem_create.size = size;
ret = drmIoctl(bo->drv->fd, DRM_IOCTL_TEGRA_GEM_CREATE, &gem_create);
if (ret) {
fprintf(stderr, "drv: DRM_IOCTL_TEGRA_GEM_CREATE failed "
- "(size=%zu)\n", size);
+ "(size=%zu)\n",
+ size);
return ret;
}
gem_tile.mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
gem_tile.value = block_height_log2;
- ret = drmCommandWriteRead(bo->drv->fd, DRM_TEGRA_GEM_SET_TILING,
- &gem_tile, sizeof(gem_tile));
+ ret = drmCommandWriteRead(bo->drv->fd, DRM_TEGRA_GEM_SET_TILING, &gem_tile,
+ sizeof(gem_tile));
if (ret < 0) {
drv_gem_bo_destroy(bo);
return ret;
}
/* Encode blocklinear parameters for EGLImage creation. */
- bo->tiling = (kind & 0xff) |
- ((block_height_log2 & 0xf) << 8);
+ bo->tiling = (kind & 0xff) | ((block_height_log2 & 0xf) << 8);
bo->format_modifiers[0] = fourcc_mod_code(NV, bo->tiling);
}
memset(&gem_map, 0, sizeof(gem_map));
gem_map.handle = bo->handles[0].u32;
- ret = drmCommandWriteRead(bo->drv->fd, DRM_TEGRA_GEM_MMAP, &gem_map,
- sizeof(gem_map));
+ ret = drmCommandWriteRead(bo->drv->fd, DRM_TEGRA_GEM_MMAP, &gem_map, sizeof(gem_map));
if (ret < 0) {
fprintf(stderr, "drv: DRM_TEGRA_GEM_MMAP failed\n");
return MAP_FAILED;
}
- void *addr = mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED,
- bo->drv->fd, gem_map.offset);
+ void *addr = mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED, bo->drv->fd,
+ gem_map.offset);
data->length = bo->total_size;
priv->untiled = calloc(1, bo->total_size);
priv->tiled = addr;
data->priv = priv;
- transfer_tiled_memory(bo, priv->tiled, priv->untiled,
- TEGRA_READ_TILED_BUFFER);
+ transfer_tiled_memory(bo, priv->tiled, priv->untiled, TEGRA_READ_TILED_BUFFER);
addr = priv->untiled;
}
{
if (data->priv) {
struct tegra_private_map_data *priv = data->priv;
- transfer_tiled_memory(bo, priv->tiled, priv->untiled,
- TEGRA_WRITE_TILED_BUFFER);
+ transfer_tiled_memory(bo, priv->tiled, priv->untiled, TEGRA_WRITE_TILED_BUFFER);
data->addr = priv->tiled;
free(priv->untiled);
free(priv);
return munmap(data->addr, data->length);
}
-struct backend backend_tegra =
-{
+struct backend backend_tegra = {
.name = "tegra",
.init = tegra_init,
.bo_create = tegra_bo_create,