gralloc0_register_buffer: initialize gralloc0 when needed

[android-x86/external-minigbm.git] / tegra.c

diff --git a/tegra.c b/tegra.c
index 02f0d1a..fb2f6a9 100644 (file)
--- a/tegra.c
+++ b/tegra.c
@@ -179,18 +179,15 @@ static void transfer_tiled_memory(struct bo *bo, uint8_t *tiled, uint8_t *untile
 
 static int tegra_init(struct driver *drv)
 {
-       int ret;
        struct format_metadata metadata;
        uint64_t use_flags = BO_USE_RENDER_MASK;
 
        metadata.tiling = NV_MEM_KIND_PITCH;
        metadata.priority = 1;
-       metadata.modifier = DRM_FORMAT_MOD_NONE;
+       metadata.modifier = DRM_FORMAT_MOD_LINEAR;
 
-       ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
-                                  &metadata, use_flags);
-       if (ret)
-               return ret;
+       drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
+                            &metadata, use_flags);
 
        drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
        drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
@@ -202,10 +199,8 @@ static int tegra_init(struct driver *drv)
        metadata.tiling = NV_MEM_KIND_C32_2CRA;
        metadata.priority = 2;
 
-       ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
-                                  &metadata, use_flags);
-       if (ret)
-               return ret;
+       drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
+                            &metadata, use_flags);
 
        drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_SCANOUT);
        drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_SCANOUT);
@@ -233,7 +228,7 @@ static int tegra_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint3
 
        ret = drmIoctl(bo->drv->fd, DRM_IOCTL_TEGRA_GEM_CREATE, &gem_create);
        if (ret) {
-               fprintf(stderr, "drv: DRM_IOCTL_TEGRA_GEM_CREATE failed (size=%zu)\n", size);
+               drv_log("DRM_IOCTL_TEGRA_GEM_CREATE failed (size=%zu)\n", size);
                return ret;
        }
 
@@ -291,7 +286,7 @@ static int tegra_bo_import(struct bo *bo, struct drv_import_fd_data *data)
        } else if (gem_get_tiling.mode == DRM_TEGRA_GEM_TILING_MODE_BLOCK) {
                bo->tiling = NV_MEM_KIND_C32_2CRA;
        } else {
-               fprintf(stderr, "tegra_bo_import: unknown tile format %d", gem_get_tiling.mode);
+               drv_log("%s: unknown tile format %d\n", __func__, gem_get_tiling.mode);
                drv_gem_bo_destroy(bo);
                assert(0);
        }
@@ -300,7 +295,7 @@ static int tegra_bo_import(struct bo *bo, struct drv_import_fd_data *data)
        return 0;
 }
 
-static void *tegra_bo_map(struct bo *bo, struct map_info *data, size_t plane, uint32_t map_flags)
+static void *tegra_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
 {
        int ret;
        struct drm_tegra_gem_mmap gem_map;
@@ -311,18 +306,18 @@ static void *tegra_bo_map(struct bo *bo, struct map_info *data, size_t plane, ui
 
        ret = drmCommandWriteRead(bo->drv->fd, DRM_TEGRA_GEM_MMAP, &gem_map, sizeof(gem_map));
        if (ret < 0) {
-               fprintf(stderr, "drv: DRM_TEGRA_GEM_MMAP failed\n");
+               drv_log("DRM_TEGRA_GEM_MMAP failed\n");
                return MAP_FAILED;
        }
 
        void *addr = mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
                          gem_map.offset);
-       data->length = bo->total_size;
+       vma->length = bo->total_size;
        if ((bo->tiling & 0xFF) == NV_MEM_KIND_C32_2CRA && addr != MAP_FAILED) {
                priv = calloc(1, sizeof(*priv));
                priv->untiled = calloc(1, bo->total_size);
                priv->tiled = addr;
-               data->priv = priv;
+               vma->priv = priv;
                transfer_tiled_memory(bo, priv->tiled, priv->untiled, TEGRA_READ_TILED_BUFFER);
                addr = priv->untiled;
        }
@@ -330,30 +325,30 @@ static void *tegra_bo_map(struct bo *bo, struct map_info *data, size_t plane, ui
        return addr;
 }
 
-static int tegra_bo_unmap(struct bo *bo, struct map_info *data)
+static int tegra_bo_unmap(struct bo *bo, struct vma *vma)
 {
-       if (data->priv) {
-               struct tegra_private_map_data *priv = data->priv;
-               data->addr = priv->tiled;
+       if (vma->priv) {
+               struct tegra_private_map_data *priv = vma->priv;
+               vma->addr = priv->tiled;
                free(priv->untiled);
                free(priv);
-               data->priv = NULL;
+               vma->priv = NULL;
        }
 
-       return munmap(data->addr, data->length);
+       return munmap(vma->addr, vma->length);
 }
 
-static int tegra_bo_flush(struct bo *bo, struct map_info *data)
+static int tegra_bo_flush(struct bo *bo, struct mapping *mapping)
 {
-       struct tegra_private_map_data *priv = data->priv;
+       struct tegra_private_map_data *priv = mapping->vma->priv;
 
-       if (priv && (data->map_flags & BO_MAP_WRITE))
+       if (priv && (mapping->vma->map_flags & BO_MAP_WRITE))
                transfer_tiled_memory(bo, priv->tiled, priv->untiled, TEGRA_WRITE_TILED_BUFFER);
 
        return 0;
 }
 
-struct backend backend_tegra = {
+const struct backend backend_tegra = {
        .name = "tegra",
        .init = tegra_init,
        .bo_create = tegra_bo_create,