From: Abhishek Kumar Date: Mon, 12 Oct 2020 10:54:03 +0000 (+0530) Subject: minigbm i915: Enable Y tiling for buffer width greater than 4096 X-Git-Url: http://git.osdn.net/view?p=android-x86%2Fexternal-minigbm.git;a=commitdiff_plain;h=6085bf30a3a8b891b89a3078578f58374720c0ba minigbm i915: Enable Y tiling for buffer width greater than 4096 Vappi hardware decoder requires NV12 buffer to be Y-tiled only ,so enable Y tiling for buffer width > 4096.Intel GEN9/10 Gpu does not support Y tiled buffers scanout and overlay plane will not be used. BUG=b:168706685,b:171518235 TEST= play 5k video on hatch Change-Id: Icb3ad0ebe58b733f22614d95f2ba3976e7d6e33d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/minigbm/+/2465962 Tested-by: Andres Calderon Jaramillo Commit-Queue: Andres Calderon Jaramillo Reviewed-by: Gurchetan Singh Reviewed-by: Robert Tarasov --- diff --git a/i915.c b/i915.c index f1cd7d3..4428f77 100644 --- a/i915.c +++ b/i915.c @@ -321,9 +321,11 @@ static int i915_bo_compute_metadata(struct bo *bo, uint32_t width, uint32_t heig } /* - * i915 only supports linear/x-tiled above 4096 wide + * i915 only supports linear/x-tiled above 4096 wide on Gen9/Gen10 GPU. + * VAAPI decode in NV12 Y tiled format so skip modifier change for NV12/P010 huge bo. */ - if (huge_bo && modifier != I915_FORMAT_MOD_X_TILED && modifier != DRM_FORMAT_MOD_LINEAR) { + if (huge_bo && format != DRM_FORMAT_NV12 && format != DRM_FORMAT_P010 && + modifier != I915_FORMAT_MOD_X_TILED && modifier != DRM_FORMAT_MOD_LINEAR) { uint32_t i; for (i = 0; modifiers && i < count; i++) { if (modifiers[i] == I915_FORMAT_MOD_X_TILED)