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arm64: tegra: Fix AGIC register range
authorJon Hunter <jonathanh@nvidia.com>
Thu, 20 Jun 2019 08:17:00 +0000 (09:17 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 4 Aug 2019 07:33:28 +0000 (09:33 +0200)
commit39dd5959a06348f13cf34652bb942c9c58c725c5
tree9e9a68b7bd7b7fb8e180a3ab1004e6a3b14c957c
parent3984eae04473472dec30f8280cc3aac514fb14ba
arm64: tegra: Fix AGIC register range

commit ba24eee6686f6ed3738602b54d959253316a9541 upstream.

The Tegra AGIC interrupt controller is an ARM GIC400 interrupt
controller. Per the ARM GIC device-tree binding, the first address
region is for the GIC distributor registers and the second address
region is for the GIC CPU interface registers. The address space for
the distributor registers is 4kB, but currently this is incorrectly
defined as 8kB for the Tegra AGIC and overlaps with the CPU interface
registers. Correct the address space for the distributor to be 4kB.

Cc: stable@vger.kernel.org
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Fixes: bcdbde433542 ("arm64: tegra: Add AGIC node for Tegra210")
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm64/boot/dts/nvidia/tegra210.dtsi