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arm64: cpufeature: Fix CTR_EL0 field definitions
authorWill Deacon <will.deacon@arm.com>
Mon, 5 Aug 2019 17:13:54 +0000 (18:13 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 11 Aug 2019 10:22:13 +0000 (12:22 +0200)
commite364e9a22b4513c9bd01a4106501774e833490b4
tree248a0e31ae2a7f30bc4e2ccd40e363e4171e6910
parent5f085ef8cf66463aa3b56b36c9574dde3166c23c
arm64: cpufeature: Fix CTR_EL0 field definitions

commit be68a8aaf925aaf35574260bf820bb09d2f9e07f upstream.

Our field definitions for CTR_EL0 suffer from a number of problems:

  - The IDC and DIC fields are missing, which causes us to enable CTR
    trapping on CPUs with either of these returning non-zero values.

  - The ERG is FTR_LOWER_SAFE, whereas it should be treated like CWG as
    FTR_HIGHER_SAFE so that applications can use it to avoid false sharing.

  - [nit] A RES1 field is described as "RAO"

This patch updates the CTR_EL0 field definitions to fix these issues.

Cc: <stable@vger.kernel.org> # 4.9.y only
Cc: Shanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/kernel/cpufeature.c