--- /dev/null
+\r
+/*\83V\83X\83e\83\80\92è\90\94\90é\8c¾*/\r
+\r
+/*debug option*/\r
+#define CHNOSPROJECT_DEBUG /*\92è\8b`\82·\82é\82Æ\83f\83o\83b\83O\83\82\81[\83h\82Å\8eÀ\8ds\81B\82»\82ê\82¼\82ê\82Ì\83f\83o\83b\83O\83I\83v\83V\83\87\83\93\82à\97L\8cø\82É\82·\82é\95K\97v\82ª\82 \82é*/\r
+\r
+#ifdef CHNOSPROJECT_DEBUG\r
+ //#define CHNOSPROJECT_DEBUG_CALLLINK\r
+ //#define CHNOSPROJECT_DEBUG_MEMORY\r
+ //#define CHNOSPROJECT_DEBUG_MEMORY_ALLOCATE_AND_FREE\r
+ //#define CHNOSPROJECT_DEBUG_EMULATOR_X86\r
+ //#define CHNOSPROJECT_DEBUG_CALLBIOS\r
+ //#define CHNOSPROJECT_DEBUG_FIFO\r
+ //#define CHNOSPROJECT_DEBUG_KBCT\r
+ //#define CHNOSPROJECT_DEBUG_MCT\r
+ //#define CHNOSPROJECT_DEBUG_MOUSE\r
+ //#define CHNOSPROJECT_DEBUG_DISPLAY\r
+ //#define CHNOSPROJECT_DEBUG_DRAWING\r
+ //#define CHNOSPROJECT_DEBUG_SHEET\r
+ //#define CHNOSPROJECT_DEBUG_TIMER\r
+ //#define CHNOSPROJECT_DEBUG_MULTITASK\r
+ //#define CHNOSPROJECT_DEBUG_PCI\r
+ //#define CHNOSPROJECT_DEBUG_COMMON_STRUCT\r
+ //#define CHNOSPROJECT_DEBUG_TEXTBOX\r
+ #define CHNOSPROJECT_DEBUG_CONSOLE\r
+#endif\r
+\r
+/*defines*/\r
+/*boolean*/\r
+#define True 1\r
+#define False 0\r
+\r
+/*null*/\r
+#define Null 0\r
+\r
+/*descriptors*/\r
+#define AR_DATA32_RW 0x4092 //AR_32+AR_PRESENT+AR_CODE_OR_DATA+AR_TYPE_DATA_RW\r
+#define AR_CODE32_ER 0x409a //AR_32+AR_PRESENT+AR_CODE_OR_DATA+AR_TYPE_CODE_ER\r
+#define AR_LDT 0x0082 //AR_PRESENT+AR_SYSTEM_DESCRIPTOR+AR_TYPE_LDT\r
+#define AR_TSS32 0x0089 //AR_PRESENT+AR_SYSTEM_DESCRIPTOR+AR_TYPE_TSS32_READY\r
+#define AR_INTGATE32 0x008e //AR_PRESENT+AR_SYSTEM_DESCRIPTOR+AR_TYPE_INTGATE32\r
+\r
+#define AR_GRANULARITY_BYTE 0x0000 //G=0 \8aÖ\90\94\82Å\8e©\93®\90Ý\92è\82·\82é\82Ì\82Å\82±\82Ì\83r\83b\83g\82Í\8fí\82É0\r
+#define AR_GRANULARITY_4KB 0x8000 //G=1\r
+#define AR_16 0x0000 //D/B=0\r
+#define AR_32 0x4000 //D/B=1\r
+#define AR_NOTPRESENT 0x0000 //P=0\r
+#define AR_PRESENT 0x0080 //P=1\r
+#define AR_SYSTEM 0x0000 //DPL=0\r
+#define AR_USER 0x0060 //DPL=3\r
+#define AR_SYSTEM_DESCRIPTOR 0x0000 //S=0\r
+#define AR_CODE_OR_DATA 0x0010 //S=1\r
+\r
+#define AR_TYPE_TSS16_READY 0x0001\r
+#define AR_TYPE_LDT 0x0002\r
+#define AR_TYPE_TSS16_BUSY 0x0003\r
+#define AR_TYPE_CALLGATE16 0x0004\r
+#define AR_TYPE_TASKGATE 0x0005\r
+#define AR_TYPE_INTGATE16 0x0006\r
+#define AR_TYPE_TRAPGATE16 0x0007\r
+#define AR_TYPE_TSS32_READY 0x0009\r
+#define AR_TYPE_TSS32_BUSY 0x000b\r
+#define AR_TYPE_CALLGATE32 0x000c\r
+#define AR_TYPE_INTGATE32 0x000e\r
+#define AR_TYPE_TRAPGATE32 0x000f\r
+\r
+#define AR_TYPE_ACCESSED 0x0001 //\8aÖ\90\94\90Ý\92è\8e\9e\82É\82Í\83N\83\8a\83A\81A\93Ç\82Ý\8fo\82µ\8e\9e\82Í\83A\83N\83Z\83X\8dÏ\82Ý\82È\82ç\83Z\83b\83g\r
+\r
+#define AR_TYPE_DATA_R 0x0000\r
+#define AR_TYPE_DATA_RW 0x0002\r
+#define AR_TYPE_DATA_R_EXPAND_DOWN 0x0004\r
+#define AR_TYPE_DATA_RW_EXPAND_DOWN 0x0006\r
+\r
+#define AR_TYPE_CODE_E 0x0008\r
+#define AR_TYPE_CODE_ER 0x000a\r
+#define AR_TYPE_CODE_E_CONFORMING 0x000c\r
+#define AR_TYPE_CODE_ER_CONFORMING 0x000e\r
+\r
+/*DebugRegister Settings*/\r
+#define DR7_RW_EXECUTE_INSTRUCTION 0\r
+#define DR7_RW_WRITE_DATA 1\r
+#define DR7_RW_IO_RW 2\r
+#define DR7_RW_DATA_RW 3\r
+\r
+#define DR7_LEN_BYTE 0\r
+#define DR7_LEN_WORD 1\r
+#define DR7_LEN_DWORD 3\r
+\r
+/*CPU Opcodes*/\r
+#define OPCODE_REG_EAX 0\r
+#define OPCODE_REG_ECX 1\r
+#define OPCODE_REG_EDX 2\r
+#define OPCODE_REG_EBX 3\r
+#define OPCODE_REG_ESP 4\r
+#define OPCODE_REG_EBP 5\r
+#define OPCODE_REG_ESI 6\r
+#define OPCODE_REG_EDI 7\r
+\r
+#define OPCODE_W_BYTE 0\r
+#define OPCODE_W_16BIT_OR_32BIT 1\r
+\r
+#define OPCODE_REG_BYTE_AL 0\r
+#define OPCODE_REG_BYTE_CL 1\r
+#define OPCODE_REG_BYTE_DL 2\r
+#define OPCODE_REG_BYTE_BL 3\r
+#define OPCODE_REG_BYTE_AH 4\r
+#define OPCODE_REG_BYTE_CH 5\r
+#define OPCODE_REG_BYTE_DH 6\r
+#define OPCODE_REG_BYTE_BH 7\r
+\r
+#define OPCODE_SREG2_ES 0\r
+#define OPCODE_SREG2_CS 1\r
+#define OPCODE_SREG2_SS 2\r
+#define OPCODE_SREG2_DS 3\r
+\r
+#define OPCODE_SREG3_ES 0\r
+#define OPCODE_SREG3_CS 1\r
+#define OPCODE_SREG3_SS 2\r
+#define OPCODE_SREG3_DS 3\r
+#define OPCODE_SREG3_FS 4\r
+#define OPCODE_SREG3_GS 5\r
+\r
+#define OPCODE_EEE_CR0 0\r
+#define OPCODE_EEE_CR2 2\r
+#define OPCODE_EEE_CR3 3\r
+#define OPCODE_EEE_CR4 4\r
+\r
+#define OPCODE_EEE_DR0 0\r
+#define OPCODE_EEE_DR1 1\r
+#define OPCODE_EEE_DR2 2\r
+#define OPCODE_EEE_DR3 3\r
+#define OPCODE_EEE_DR6 6\r
+#define OPCODE_EEE_DR7 7\r
+\r
+#define OPCODE_TTTN_OVERFLOW 0\r
+#define OPCODE_TTTN_NO_OVERFLOW 1\r
+#define OPCODE_TTTN_BELOW 2\r
+#define OPCODE_TTTN_NOT_BELOW 3\r
+#define OPCODE_TTTN_EQUAL_OR_ZERO 4\r
+#define OPCODE_TTTN_NOT_EQUAL_OR_ZERO 5\r
+#define OPCODE_TTTN_NOT_ABOVE 6\r
+#define OPCODE_TTTN_ABOVE 7\r
+#define OPCODE_TTTN_SIGN 8\r
+#define OPCODE_TTTN_NOT_SIGN 9\r
+#define OPCODE_TTTN_PARITY 10\r
+#define OPCODE_TTTN_NOT_PARITY 10\r
+#define OPCODE_TTTN_LESS_THAN 10\r
+#define OPCODE_TTTN_NOT_LESS_THAN 10\r
+#define OPCODE_TTTN_NOT_GREATER_THAN 10\r
+#define OPCODE_TTTN_GREATER_THAN 10\r
+\r
+#define OPCODE_D_REG_SOURCE 0\r
+#define OPCODE_D_REG_DESTINATION 1\r
+\r
+#define OPCODE_MOD_INDEXONLY 0\r
+#define OPCODE_MOD_INDEX_AND_DISP_BYTE 1\r
+#define OPCODE_MOD_INDEX_AND_DISP_FULL 2\r
+#define OPCODE_MOD_REGISTER 3\r
+\r
+#define OPCODE_RM32_ADDR_EAX 0\r
+#define OPCODE_RM32_ADDR_ECX 1\r
+#define OPCODE_RM32_ADDR_EDX 2\r
+#define OPCODE_RM32_ADDR_EBX 3\r
+#define OPCODE_RM32_ADDR_SIB 4\r
+#define OPCODE_RM32_ADDR_EBP 5\r
+#define OPCODE_RM32_MOD00_ADDR_DISP32 5\r
+#define OPCODE_RM32_ADDR_ESI 6\r
+#define OPCODE_RM32_ADDR_EDI 7\r
+\r
+#define OPCODE_RM16_ADDR_BX_SI 0\r
+#define OPCODE_RM16_ADDR_BX_DI 1\r
+#define OPCODE_RM16_ADDR_BP_SI 2\r
+#define OPCODE_RM16_ADDR_BP_DI 3\r
+#define OPCODE_RM16_ADDR_SI 4\r
+#define OPCODE_RM16_ADDR_DI 5\r
+#define OPCODE_RM16_ADDR_BP 6\r
+#define OPCODE_RM16_MOD00_ADDR_DISP16 6\r
+#define OPCODE_RM16_ADDR_BX 7\r
+\r
+#define OPCODE_PREFIX_NONE 0\r
+\r
+#define OPCODE_PREFIX_LOCK 0xf0\r
+#define OPCODE_PREFIX_REPNE_REPNZ 0xf2\r
+#define OPCODE_PREFIX_REP_REPE_REPZ 0xf3\r
+\r
+//#define OPCODE_PREFIX_CS 0x2e\r
+//#define OPCODE_PREFIX_SS 0x36\r
+//#define OPCODE_PREFIX_DS 0x3e\r
+//#define OPCODE_PREFIX_ES 0x26\r
+//#define OPCODE_PREFIX_FS 0x64\r
+//#define OPCODE_PREFIX_GS 0x65\r
+#define OPCODE_PREFIX_BRANCH_NOT_TAKEN 0x2e\r
+#define OPCODE_PREFIX_BRANCH_TAKEN 0x3e\r
+\r
+#define OPCODE_PREFIX_OPERAND_SIZE 0x66\r
+\r
+#define OPCODE_PREFIX_ADDRESS_SIZE 0x67\r
+\r
+/*PIC io port*/\r
+#define PIC0_ICW1 0x0020\r
+#define PIC0_OCW2 0x0020\r
+#define PIC0_IMR 0x0021\r
+#define PIC0_ICW2 0x0021\r
+#define PIC0_ICW3 0x0021\r
+#define PIC0_ICW4 0x0021\r
+#define PIC1_ICW1 0x00a0\r
+#define PIC1_OCW2 0x00a0\r
+#define PIC1_IMR 0x00a1\r
+#define PIC1_ICW2 0x00a1\r
+#define PIC1_ICW3 0x00a1\r
+#define PIC1_ICW4 0x00a1\r
+\r
+/*KBD io port*/\r
+#define PORT_KEYDATA 0x0060\r
+#define PORT_KEYSTA 0x0064\r
+#define PORT_KEYCMD 0x0064\r
+#define KBC_MODE 0x47 //Keyboard and Mouse Interrupt Enable.\r
+#define KEYSTA_SEND_NOTREADY 0x02\r
+#define KEYDATA_ACK 0xfa\r
+#define KEYDATA_RESEND 0xfe\r
+#define KEYDATA_TEST_SUCCEEDED 0xaa\r
+#define KEYDATA_TEST_FAILED 0xfc\r
+#define KEYCMD_WRITE_8042_MODE_REG 0x60\r
+#define KEYCMD_SENDTO_MOUSE 0xd4\r
+#define KEYCMD_LED 0xed\r
+\r
+/*Mouse*/\r
+#define MOUSECMD_RESET 0xff\r
+//#define MOUSECMD_SET_DEFAULTS 0xf6\r
+//#define MOUSECMD_DISABLE_DATA_REPORTING 0xf5\r
+#define MOUSECMD_ENABLE_DATA_REPORTING 0xf4\r
+#define MOUSECMD_SET_SAMPLE_RATE 0xf3\r
+#define MOUSECMD_GET_DEVICE_ID 0xf2\r
+#define MOUSE_TYPE_3BUTTON 0x00\r
+#define MOUSE_TYPE_3BUTTON_SCROLL 0x03\r
+\r
+/*COM1 io port*/\r
+#define COM1_RX 0x03f8\r
+#define COM1_TX 0x03f8\r
+#define COM1_BAUD_LSB 0x03f8\r
+#define COM1_BAUD_MSB 0x03f9\r
+#define COM1_INTR_ENBL 0x03f9\r
+#define COM1_INTR_ID 0x03fa\r
+#define COM1_CTRL_FIFO 0x03fa\r
+#define COM1_CTRL_LINE 0x03fb\r
+#define COM1_CTRL_MODEM 0x03fc\r
+#define COM1_STA_LINE 0x03fd\r
+#define COM1_STA_MODEM 0x03fe\r
+\r
+/*PIT io port*/\r
+#define PIT_CTRL 0x0043\r
+#define PIT_CNT0 0x0040\r
+\r
+/*VGA*/\r
+#define VGA_CRTC_R_NUMBER 0x03d4\r
+#define VGA_CRTC_R_DATA 0x03d5\r
+#define VGA_CRTC_R_CURSOR_LOCATION_HIGH 0x0e\r
+#define VGA_CRTC_R_CURSOR_LOCATION_LOW 0x0f\r
+#define VGA_TEXTMODE_ADR 0xb8000\r
+#define VGA_VDAC_DATA 0x03c9\r
+#define VGA_VDAC_WRITE_ADR 0x03c8\r
+#define VGA_VRAM_ADR (void *)0x000a0000\r
+#define VGA08_VRAM_XSIZE 320\r
+#define VGA08_VRAM_YSIZE 200\r
+\r
+#define VESA_LINEAR_ACCESS 0x4000\r
+#define VESA_OMIT_CLEARING_VRAM 0x8000\r
+\r
+#define VBE_REALMODE_RETVALUE_ADDRESS (void *)0x00000e00;\r
+#define DISPLAYMODE_BIOS 0x0000\r
+#define DISPLAYMODE_VBE_WINDOW 0x0001\r
+#define DISPLAYMODE_VBE_LINEAR 0x0002\r
+\r
+/*settings*/\r
+/*IPL defines*/\r
+#define ADR_DISKIMG (void *)0x00100000\r
+\r
+/*system segments*/\r
+#define SYSTEM_DS 0x01\r
+#define SYSTEM_CS 0x02\r
+\r
+/*descriptor tables*/\r
+#define ADR_IDT 0x0026f800\r
+#define LIMIT_IDT 0x000007ff\r
+#define ADR_GDT 0x00270000\r
+#define LIMIT_GDT 0x0000ffff\r
+#define ADR_BOOTPACK 0x00280000\r
+#define LIMIT_BOOTPACK 0x0007ffff\r
+\r
+/*error id*/\r
+#define ERROR_CPU_EXCEPTION_00 0x00000000 //int *esp\r
+#define ERROR_CPU_EXCEPTION_01 0x00000001 //int *esp\r
+#define ERROR_CPU_EXCEPTION_02 0x00000002 //int *esp\r
+#define ERROR_CPU_EXCEPTION_03 0x00000003 //int *esp\r
+#define ERROR_CPU_EXCEPTION_04 0x00000004 //int *esp\r
+#define ERROR_CPU_EXCEPTION_05 0x00000005 //int *esp\r
+#define ERROR_CPU_EXCEPTION_06 0x00000006 //int *esp\r
+#define ERROR_CPU_EXCEPTION_07 0x00000007 //int *esp\r
+#define ERROR_CPU_EXCEPTION_08 0x00000008 //int *esp\r
+#define ERROR_CPU_EXCEPTION_09 0x00000009 //int *esp\r
+#define ERROR_CPU_EXCEPTION_0A 0x0000000a //int *esp\r
+#define ERROR_CPU_EXCEPTION_0B 0x0000000b //int *esp\r
+#define ERROR_CPU_EXCEPTION_0C 0x0000000c //int *esp\r
+#define ERROR_CPU_EXCEPTION_0D 0x0000000d //int *esp\r
+#define ERROR_CPU_EXCEPTION_0E 0x0000000e //int *esp\r
+#define ERROR_CPU_EXCEPTION_0F 0x0000000f //int *esp\r
+#define ERROR_CPU_EXCEPTION_10 0x00000010 //int *esp\r
+#define ERROR_CPU_EXCEPTION_11 0x00000011 //int *esp\r
+#define ERROR_CPU_EXCEPTION_12 0x00000012 //int *esp\r
+#define ERROR_CPU_EXCEPTION_13 0x00000013 //int *esp\r
+#define ERROR_CPU_EXCEPTION_14 0x00000014 //int *esp\r
+#define ERROR_CPU_EXCEPTION_15 0x00000015 //int *esp\r
+#define ERROR_CPU_EXCEPTION_16 0x00000016 //int *esp\r
+#define ERROR_CPU_EXCEPTION_17 0x00000017 //int *esp\r
+#define ERROR_CPU_EXCEPTION_18 0x00000018 //int *esp\r
+#define ERROR_CPU_EXCEPTION_19 0x00000019 //int *esp\r
+#define ERROR_CPU_EXCEPTION_1A 0x0000001a //int *esp\r
+#define ERROR_CPU_EXCEPTION_1B 0x0000001b //int *esp\r
+#define ERROR_CPU_EXCEPTION_1C 0x0000001c //int *esp\r
+#define ERROR_CPU_EXCEPTION_1D 0x0000001d //int *esp\r
+#define ERROR_CPU_EXCEPTION_1E 0x0000001e //int *esp\r
+#define ERROR_CPU_EXCEPTION_1F 0x0000001f //int *esp\r
+#define ERROR_CPU_EXCEPTIONS 0x0000001f\r
+\r
+#define ERROR_NO_MORE_SEGMENT 0x00000020 //uint *retaddr\r
+#define ERROR_NOT_ENOUGH_FREE_MEMORY 0x00000021 //IO_MemoryControl ctrl, uint size\r
+#define ERROR_MEMORY_FREE_RANGE_OVERLAPPED 0x00000022 //IO_MemoryControl ctrl, uint tagno\r
+#define ERROR_NO_MORE_FREE_TAG 0x00000023 //IO_MemoryControl ctrl\r
+#define ERROR_INVALID_FREE_MEMORY_INDEX 0x00000024 //IO_MemoryControl ctrl, uint tagno\r
+#define ERROR_FIFO_BUFFER_OVERFLOW 0x00000025 //DATA_FIFO32 *fifo\r
+\r
+/*FIFO buffer*/\r
+#define SIGNAL_ARGUMENTS_END 0xfefe1234\r
+/*task*/\r
+#define TASK_FIFOSIZE (4 * 64)\r
+\r
+/*exceptions esp[] data with errorcode*/\r
+#define EXCEPTION_INFO_EDI 0x00\r
+#define EXCEPTION_INFO_ESI 0x01\r
+#define EXCEPTION_INFO_EBP 0x02\r
+#define EXCEPTION_INFO_ESP 0x03\r
+#define EXCEPTION_INFO_EBX 0x04\r
+#define EXCEPTION_INFO_EDX 0x05\r
+#define EXCEPTION_INFO_ECX 0x06\r
+#define EXCEPTION_INFO_EAX 0x07\r
+#define EXCEPTION_INFO_DS 0x08\r
+#define EXCEPTION_INFO_ES 0x09\r
+#define EXCEPTION_INFO_ERRORCODE 0x0a\r
+#define EXCEPTION_INFO_EIP 0x0b\r
+#define EXCEPTION_INFO_CS 0x0c\r
+#define EXCEPTION_INFO_EFLAGS 0x0d\r
+#define EXCEPTION_INFO_USER_ESP 0x0e\r
+#define EXCEPTION_INFO_USER_SS 0x0f\r
+\r
+/*sheet*/\r
+#define SHEET_MAX_XSIZE 65535\r
+#define SHEET_MAX_YSIZE 65535\r
+#define SHEET_MAX_CHILDREN 255\r
+#define SHEET_LOCATION_NOCHANGE 0x7ffffffe\r
+\r
+/*console*/\r
+#define CONSOLE_PRINTF_BUFFER_SIZE 1024\r
+\r
+/*floppy*/\r
+#define FLOPPYDISK_FAT0_OFFSET 0x000200\r
+#define FLOPPYDISK_FAT1_OFFSET 0x001400 \r
+#define FLOPPYDISK_RDE_OFFSET 0x002600\r
+#define FLOPPYDISK_RDE_ENTRIES 224\r
+#define FLOPPYDISK_SECTORS (1440 * 2)\r
+\r
+/*file*/\r
+#define FILE_PATH_LENGTH_MAX (256 - 1)\r
+\r