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[VM][STATE] Apply new framework to some VMs.
[csp-qt/common_source_project-fm7.git] / source / src / vm / mz3500 / main.cpp
diff --git a/source/src/vm/mz3500/main.cpp b/source/src/vm/mz3500/main.cpp
index 1f36e9b..88233d6 100644 (file)
--- a/source/src/vm/mz3500/main.cpp
+++ b/source/src/vm/mz3500/main.cpp
@@ -4,10 +4,10 @@
        Author : Takeda.Toshiya
        Date   : 2010.08.31-
 
-       [ main ]
+       [ main pcb ]
 */
 
-#include "main.h"
+#include "./main.h"
 #include "../upd765a.h"
 
 #define SET_BANK(s, e, w, r) { \
@@ -113,7 +113,7 @@ void MAIN::write_io8(uint32_t addr, uint32_t data)
                if(data & 0x40) {
                        for(int i = 0; i < 3; i++) {
                                if(data & (1 << i)) {
-//                                     emu->out_debug_log(_T("MAIN->FDC\tDRIVE=%d\n"), i);
+//                                     this->out_debug_log(_T("MAIN->FDC\tDRIVE=%d\n"), i);
                                        d_fdc->write_signal(SIG_UPD765A_DRVSEL, i, 3);
                                        break;
                                }
@@ -136,7 +136,7 @@ void MAIN::write_io8(uint32_t addr, uint32_t data)
                break;
        case 0xfc:      // mz3500sm p.23
                if((srqb & 2) != (data & 2)) {
-//                     emu->out_debug_log(_T("MAIN->SUB\tBUSREQ=%d\n"), (data&2)?1:0);
+//                     this->out_debug_log(_T("MAIN->SUB\tBUSREQ=%d\n"), (data&2)?1:0);
                        d_subcpu->write_signal(SIG_CPU_BUSREQ, data, 2);
                }
                srqb = data;
@@ -150,7 +150,7 @@ void MAIN::write_io8(uint32_t addr, uint32_t data)
                break;
        case 0xfd:      // mz3500sm p.23
                if(!(sres & 0x80) && (data & 0x80)) {
-//                     emu->out_debug_log(_T("MAIN->SUB\tRESET\n"));
+//                     this->out_debug_log(_T("MAIN->SUB\tRESET\n"));
                        d_subcpu->reset();
                }
                sres = data;
@@ -231,17 +231,17 @@ void MAIN::write_signal(int id, uint32_t data, uint32_t mask)
 {
        if(id == SIG_MAIN_SACK) {
                sack = ((data & mask) != 0);
-//             emu->out_debug_log(_T("SUB->MAIN\tSACK=%d\n"), sack?1:0);
+//             this->out_debug_log(_T("SUB->MAIN\tSACK=%d\n"), sack?1:0);
        } else if(id == SIG_MAIN_SRDY) {
                srdy = ((data & mask) != 0);
-//             emu->out_debug_log(_T("SUB->MAIN\tSRDY=%d\n"), srdy?1:0);
+//             this->out_debug_log(_T("SUB->MAIN\tSRDY=%d\n"), srdy?1:0);
        } else if(id == SIG_MAIN_INTFD) {
                intfd = ((data & mask) != 0);
-//             emu->out_debug_log(_T("FDC->MAIN\tINTFD=%d\n"), intfd?1:0);
+//             this->out_debug_log(_T("FDC->MAIN\tINTFD=%d\n"), intfd?1:0);
                update_irq();
        } else if(id == SIG_MAIN_INT0) {
                int0 = ((data & mask) != 0);
-//             emu->out_debug_log(_T("SUB->MAIN\tINT0=%d\n"), int0?1:0);
+//             this->out_debug_log(_T("SUB->MAIN\tINT0=%d\n"), int0?1:0);
                update_irq();
        } else if(id == SIG_MAIN_INT1) {
                int1 = ((data & mask) != 0);
@@ -289,8 +289,8 @@ void MAIN::update_irq()
                }
        }
        if(next) {
-//             emu->out_debug_log(_T("MAIN IRQ=%d SRC=%d\n"), next?1:0,inp);
-               d_cpu->set_intr_line(true, true, 0);
+//             this->out_debug_log(_T("MAIN IRQ=%d SRC=%d\n"), next?1:0,inp);
+               d_maincpu->set_intr_line(true, true, 0);
        }
 }
 
@@ -391,72 +391,42 @@ void MAIN::update_bank()
 
 #define STATE_VERSION  2
 
-void MAIN::save_state(FILEIO* state_fio)
+bool MAIN::process_state(FILEIO* state_fio, bool loading)
 {
-       state_fio->FputUint32(STATE_VERSION);
-       state_fio->FputInt32(this_device_id);
-       
-       state_fio->Fwrite(ram, sizeof(ram), 1);
-       state_fio->Fwrite(common, sizeof(common), 1);
-       state_fio->FputUint8(ma);
-       state_fio->FputUint8(ms);
-       state_fio->FputUint8(mo);
-       state_fio->FputBool(me1);
-       state_fio->FputBool(me2);
-       state_fio->FputUint8(srqb);
-       state_fio->FputUint8(sres);
-       state_fio->FputBool(sack);
-       state_fio->FputBool(srdy);
-       state_fio->FputBool(intfd);
-       state_fio->FputBool(int0);
-       state_fio->FputBool(int1);
-       state_fio->FputBool(int2);
-       state_fio->FputBool(int3);
-       state_fio->FputBool(int4);
-       state_fio->FputBool(me);
-       state_fio->FputBool(e1);
-       state_fio->FputUint8(inp);
-       state_fio->FputBool(motor);
-       state_fio->FputBool(drq);
-       state_fio->FputBool(index);
-       state_fio->FputBool(crt_400line);
-}
-
-bool MAIN::load_state(FILEIO* state_fio)
-{
-       if(state_fio->FgetUint32() != STATE_VERSION) {
+       if(!state_fio->StateCheckUint32(STATE_VERSION)) {
                return false;
        }
-       if(state_fio->FgetInt32() != this_device_id) {
+       if(!state_fio->StateCheckInt32(this_device_id)) {
                return false;
        }
-       state_fio->Fread(ram, sizeof(ram), 1);
-       state_fio->Fread(common, sizeof(common), 1);
-       ma = state_fio->FgetUint8();
-       ms = state_fio->FgetUint8();
-       mo = state_fio->FgetUint8();
-       me1 = state_fio->FgetBool();
-       me2 = state_fio->FgetBool();
-       srqb = state_fio->FgetUint8();
-       sres = state_fio->FgetUint8();
-       sack = state_fio->FgetBool();
-       srdy = state_fio->FgetBool();
-       intfd = state_fio->FgetBool();
-       int0 = state_fio->FgetBool();
-       int1 = state_fio->FgetBool();
-       int2 = state_fio->FgetBool();
-       int3 = state_fio->FgetBool();
-       int4 = state_fio->FgetBool();
-       me = state_fio->FgetBool();
-       e1 = state_fio->FgetBool();
-       inp = state_fio->FgetUint8();
-       motor = state_fio->FgetBool();
-       drq = state_fio->FgetBool();
-       index = state_fio->FgetBool();
-       crt_400line = state_fio->FgetBool();
+       state_fio->StateBuffer(ram, sizeof(ram), 1);
+       state_fio->StateBuffer(common, sizeof(common), 1);
+       state_fio->StateUint8(ma);
+       state_fio->StateUint8(ms);
+       state_fio->StateUint8(mo);
+       state_fio->StateBool(me1);
+       state_fio->StateBool(me2);
+       state_fio->StateUint8(srqb);
+       state_fio->StateUint8(sres);
+       state_fio->StateBool(sack);
+       state_fio->StateBool(srdy);
+       state_fio->StateBool(intfd);
+       state_fio->StateBool(int0);
+       state_fio->StateBool(int1);
+       state_fio->StateBool(int2);
+       state_fio->StateBool(int3);
+       state_fio->StateBool(int4);
+       state_fio->StateBool(me);
+       state_fio->StateBool(e1);
+       state_fio->StateUint8(inp);
+       state_fio->StateBool(motor);
+       state_fio->StateBool(drq);
+       state_fio->StateBool(index);
+       state_fio->StateBool(crt_400line);
        
        // post process
-        update_bank();
+       if(loading) {
+                update_bank();
+       }
        return true;
 }
-
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