[ memory ]
*/
-#include "memory.h"
+#include "./memory.h"
#include "timer.h"
#define RAM (MEMORY_BASE + RAM_BASE)
#define SYSTEMROM2 (MEMORY_BASE + SYSTEMROM2_BASE)
#define CGROM6 (MEMORY_BASE + CGROM6_BASE)
+namespace PC6001 {
+
void MEMORY::initialize()
{
FILEIO* fio = new FILEIO();
EnWrite[0]=0; EnWrite[1]=EnWrite[2]=EnWrite[3]=1;
#else
int I, J;
- byte *addr=RAM;
+ uint8_t *addr=RAM;
memset(RAM ,0,0x10000);
memset(EmptyRAM, 0, 0x2000);
for(I=0; I<256; I++ ){
EXTROM1 = EXTROM2 = EmptyRAM;
}
#if defined(_PC6001MK2) || defined(_PC6601)
- vm->sr_mode=0;
+ static_cast<VM *>(vm)->sr_mode=0;
CGROM = CGROM1;
VRAM = RAM+0xE000;
for (I=0; I<0x200; I++ ) *(VRAM+I)=0xde;
for(J=4;J<8;J++) {RdMem[J]=RAM+0x2000*J;WrMem[J]=RAM+0x2000*J;};
EnWrite[0]=EnWrite[1]=0; EnWrite[2]=EnWrite[3]=1;
#elif defined(_PC6601SR) || defined(_PC6001MK2SR)
- vm->sr_mode=1;
+ static_cast<VM *>(vm)->sr_mode=1;
bitmap=1;
cols=40;
rows=20;
#endif
}
-void MEMORY::write_data8(uint32 addr, uint32 data)
+void MEMORY::write_data8(uint32_t addr, uint32_t data)
{
#if defined(_PC6601SR) || defined(_PC6001MK2SR)
/* Graphics Vram Write (SR basic) */
- if(vm->sr_mode && chk_gvram(addr ,8))
+ if(static_cast<VM *>(vm)->sr_mode && chk_gvram(addr ,8))
gvram_write(addr, data);
else
#endif
WrMem[addr >> 13][addr & 0x1FFF] = data;
}
-uint32 MEMORY::read_data8(uint32 addr)
+uint32_t MEMORY::read_data8(uint32_t addr)
{
#if defined(_PC6601SR) || defined(_PC6001MK2SR)
/* Graphics Vram Read (SR basic) */
- if(vm->sr_mode && chk_gvram(addr, 0))
+ if(static_cast<VM *>(vm)->sr_mode && chk_gvram(addr, 0))
return(gvram_read(addr));
#endif
return(RdMem[addr >> 13][addr & 0x1FFF]);
}
-void MEMORY::write_io8(uint32 addr, uint32 data)
+void MEMORY::write_io8(uint32_t addr, uint32_t data)
{
unsigned int VRAMHead[2][4] = {
{ 0xc000, 0xe000, 0x8000, 0xa000 },
{ 0x8000, 0xc000, 0x0000, 0x4000 }
};
- uint16 port=(addr & 0x00ff);
- uint8 Value=data;
+ uint16_t port=(addr & 0x00ff);
+ uint8_t Value=data;
switch(port)
{
#ifdef _PC6001
break;
#endif
case 0xB0:
- if (vm->sr_mode) {
+ if (static_cast<VM *>(vm)->sr_mode) {
d_timer->set_portB0(Value);
} else {
VRAM=(RAM+VRAMHead[CRTMode1][(data&0x06)>>1]);
CRTMode3=(Value&0x08) ? 0 : 1;
#if defined(_PC6601SR) || defined(_PC6001MK2SR)
portC1 = Value;
- if (vm->sr_mode)
+ if (static_cast<VM *>(vm)->sr_mode)
lines=(Value&0x01) ? 200 : 204;
- if (vm->sr_mode)
+ if (static_cast<VM *>(vm)->sr_mode)
CGROM = CGROM6; // N66SR BASIC use CGROM6
else
CGROM = ((CRTMode1 == 0) ? CGROM1 : CGROM5);
- if (vm->sr_mode) {
+ if (static_cast<VM *>(vm)->sr_mode) {
if (CRTMode1==1 && CRTMode2==0 && !bitmap) { /* width 80 */
cols=80;
} else if(CRTMode1==0 && CRTMode2==0 && !bitmap) { /* Width 40 */
#endif
break;
case 0xC2: // ROM swtich
- if (vm->sr_mode) return; /* sr_mode do nothing! */
+ if (static_cast<VM *>(vm)->sr_mode) return; /* sr_mode do nothing! */
if ((Value&0x02)==0x00) CurKANJIROM=KANJIROM;
else CurKANJIROM=KANJIROM+0x4000;
if ((Value&0x01)==0x00) {
bitmap = (Value & 8)? 0:1;
rows = (Value & 4)? 20:25;
/// busreq = (Value & 2)? 0:1;
- vm->sr_mode = ((Value & 1)==1) ? 0 : 1;
- if (bitmap && vm->sr_mode)
+ static_cast<VM *>(vm)->sr_mode = ((Value & 1)==1) ? 0 : 1;
+ if (bitmap && static_cast<VM *>(vm)->sr_mode)
{
VRAM = (Value & 0x10) ? RAM+0x8000:RAM+0x0000;
}
- if (vm->sr_mode) {
+ if (static_cast<VM *>(vm)->sr_mode) {
CGROM=CGROM6;
portF0=0x11;
}
break;
case 0xC9:
- if (vm->sr_mode && !bitmap )
+ if (static_cast<VM *>(vm)->sr_mode && !bitmap )
{
TEXTVRAM=RAM+(Value & 0xf)*0x1000;
}
case 0xCF: portCF=0; break;
#endif
case 0xF0: // read block set
- if (vm->sr_mode) return; /* sr_mode do nothing! */
+ if (static_cast<VM *>(vm)->sr_mode) return; /* sr_mode do nothing! */
portF0 = Value;
switch(data & 0x0f)
{
if (CGSW93) RdMem[3] = CGROM;
break;
case 0xF1: // read block set
- if (vm->sr_mode) return; /* sr_mode do nothing! */
+ if (static_cast<VM *>(vm)->sr_mode) return; /* sr_mode do nothing! */
portF1 = Value;
switch(data & 0x0f)
{
};
break;
case 0xF2: // write ram block set
- if (vm->sr_mode) return; /* sr_mode do nothing! */
+ if (static_cast<VM *>(vm)->sr_mode) return; /* sr_mode do nothing! */
if (data & 0x40) {EnWrite[3]=1;WrMem[6]=RAM+0xc000;WrMem[7]=RAM+0xe000;}
else EnWrite[3]=0;
if (data & 0x010) {EnWrite[2]=1;WrMem[4]=RAM+0x8000;WrMem[5]=RAM+0xa000;}
}
#ifndef _PC6001
-uint32 MEMORY::read_io8(uint32 addr)
+uint32_t MEMORY::read_io8(uint32_t addr)
{
- uint16 port=(addr & 0x00ff);
- byte Value=0xff;
+ uint16_t port=(addr & 0x00ff);
+ uint8_t Value=0xff;
switch(port)
{
case 0xC0: Value=0xff;break;
case 0xC2: Value=0xff;break;
#endif
- case 0xF0: if (!vm->sr_mode) Value=portF0;break;
- case 0xF1: if (!vm->sr_mode) Value=portF1;break;
+ case 0xF0: if (!static_cast<VM *>(vm)->sr_mode) Value=portF0;break;
+ case 0xF1: if (!static_cast<VM *>(vm)->sr_mode) Value=portF1;break;
}
return(Value);
}
void MEMORY::event_vline(int v, int clock)
{
#if defined(_PC6601SR) || defined(_PC6001MK2SR)
- if(vm->sr_mode) {
+ if(static_cast<VM *>(vm)->sr_mode) {
if(v == (CRTMode1 ? 200 : 192)) {
d_timer->write_signal(SIG_TIMER_IRQ_VRTC, 1, 1);
}
}
#endif
-void MEMORY::write_signal(int id, uint32 data, uint32 mask)
+void MEMORY::write_signal(int id, uint32_t data, uint32_t mask)
{
if(id == SIG_MEMORY_PIO_PORT_C) {
#ifdef _PC6001
}
#else
if(data & 4) {
- CGSW93=0; if (!vm->sr_mode) write_io8(0xf0, portF0);
+ CGSW93=0; if (!static_cast<VM *>(vm)->sr_mode) write_io8(0xf0, portF0);
} else {
CGSW93=1; RdMem[3]=CGROM;
}
#define STATE_VERSION 1
-void MEMORY::save_state(FILEIO* state_fio)
-{
- state_fio->FputUint32(STATE_VERSION);
- state_fio->FputInt32(this_device_id);
-
- state_fio->Fwrite(RAM, RAM_SIZE, 1);
- state_fio->FputInt32((int)(CGROM - MEMORY_BASE));
- state_fio->FputInt32((int)(EXTROM1 - MEMORY_BASE));
- state_fio->FputInt32((int)(EXTROM2 - MEMORY_BASE));
- for(int i = 0; i < 8; i++) {
- state_fio->FputInt32((int)(RdMem[i] - MEMORY_BASE));
- state_fio->FputInt32((int)(WrMem[i] - MEMORY_BASE));
- }
- state_fio->FputInt32((int)(VRAM - MEMORY_BASE));
- state_fio->Fwrite(EnWrite, sizeof(EnWrite), 1);
- state_fio->FputUint8(CGSW93);
- state_fio->FputBool(inserted);
-#ifndef _PC6001
- state_fio->FputUint8(CRTKILL);
- state_fio->FputInt32((int)(CurKANJIROM - MEMORY_BASE));
- state_fio->FputUint8(CRTMode1);
- state_fio->FputUint8(CRTMode2);
- state_fio->FputUint8(CRTMode3);
- state_fio->FputUint8(CSS1);
- state_fio->FputUint8(CSS2);
- state_fio->FputUint8(CSS3);
- state_fio->FputUint8(portF0);
- state_fio->FputUint8(portF1);
-#if defined(_PC6601SR) || defined(_PC6001MK2SR)
- state_fio->FputInt32(bitmap);
- state_fio->FputInt32(cols);
- state_fio->FputInt32(rows);
- state_fio->FputInt32(lines);
- state_fio->FputInt32((int)(TEXTVRAM - MEMORY_BASE));
- state_fio->FputInt32((int)(SYSROM2 - MEMORY_BASE));
- state_fio->Fwrite(EXTRAM, EXTRAM_SIZE, 1);
- state_fio->Fwrite(port60, sizeof(port60), 1);
- state_fio->FputUint8(portC1);
- state_fio->FputUint8(portC8);
- state_fio->FputUint8(portCA);
- state_fio->FputUint8(portCB);
- state_fio->FputUint8(portCC);
- state_fio->FputUint8(portCE);
- state_fio->FputUint8(portCF);
- state_fio->Fwrite(palet, sizeof(palet), 1);
-#endif
-#endif
-}
-
-bool MEMORY::load_state(FILEIO* state_fio)
+bool MEMORY::process_state(FILEIO* state_fio, bool loading)
{
- if(state_fio->FgetUint32() != STATE_VERSION) {
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
return false;
}
- if(state_fio->FgetInt32() != this_device_id) {
+ if(!state_fio->StateCheckInt32(this_device_id)) {
return false;
}
- state_fio->Fread(RAM, RAM_SIZE, 1);
- CGROM = MEMORY_BASE + state_fio->FgetInt32();
- EXTROM1 = MEMORY_BASE + state_fio->FgetInt32();
- EXTROM2 = MEMORY_BASE + state_fio->FgetInt32();
- for(int i = 0; i < 8; i++) {
- RdMem[i] = MEMORY_BASE + state_fio->FgetInt32();
- WrMem[i] = MEMORY_BASE + state_fio->FgetInt32();
+ state_fio->StateBuffer(RAM, RAM_SIZE, 1);
+ if(loading) {
+ CGROM = MEMORY_BASE + state_fio->FgetInt32_LE();
+ EXTROM1 = MEMORY_BASE + state_fio->FgetInt32_LE();
+ EXTROM2 = MEMORY_BASE + state_fio->FgetInt32_LE();
+ for(int i = 0; i < 8; i++) {
+ RdMem[i] = MEMORY_BASE + state_fio->FgetInt32_LE();
+ WrMem[i] = MEMORY_BASE + state_fio->FgetInt32_LE();
+ }
+ VRAM = MEMORY_BASE + state_fio->FgetInt32_LE();
+ } else {
+ state_fio->FputInt32_LE((int)(CGROM - MEMORY_BASE));
+ state_fio->FputInt32_LE((int)(EXTROM1 - MEMORY_BASE));
+ state_fio->FputInt32_LE((int)(EXTROM2 - MEMORY_BASE));
+ for(int i = 0; i < 8; i++) {
+ state_fio->FputInt32_LE((int)(RdMem[i] - MEMORY_BASE));
+ state_fio->FputInt32_LE((int)(WrMem[i] - MEMORY_BASE));
+ }
+ state_fio->FputInt32_LE((int)(VRAM - MEMORY_BASE));
}
- VRAM = MEMORY_BASE + state_fio->FgetInt32();
- state_fio->Fread(EnWrite, sizeof(EnWrite), 1);
- CGSW93 = state_fio->FgetUint8();
- inserted = state_fio->FgetBool();
+ state_fio->StateBuffer(EnWrite, sizeof(EnWrite), 1);
+ state_fio->StateUint8(CGSW93);
+ state_fio->StateBool(inserted);
#ifndef _PC6001
- CRTKILL = state_fio->FgetUint8();
- CurKANJIROM = MEMORY_BASE + state_fio->FgetInt32();
- CRTMode1 = state_fio->FgetUint8();
- CRTMode2 = state_fio->FgetUint8();
- CRTMode3 = state_fio->FgetUint8();
- CSS1 = state_fio->FgetUint8();
- CSS2 = state_fio->FgetUint8();
- CSS3 = state_fio->FgetUint8();
- portF0 = state_fio->FgetUint8();
- portF1 = state_fio->FgetUint8();
+ state_fio->StateUint8(CRTKILL);
+ if(loading) {
+ CurKANJIROM = MEMORY_BASE + state_fio->FgetInt32_LE();
+ } else {
+ state_fio->FputInt32_LE((int)(CurKANJIROM - MEMORY_BASE));
+ }
+ state_fio->StateUint8(CRTMode1);
+ state_fio->StateUint8(CRTMode2);
+ state_fio->StateUint8(CRTMode3);
+ state_fio->StateUint8(CSS1);
+ state_fio->StateUint8(CSS2);
+ state_fio->StateUint8(CSS3);
+ state_fio->StateUint8(portF0);
+ state_fio->StateUint8(portF1);
#if defined(_PC6601SR) || defined(_PC6001MK2SR)
- bitmap = state_fio->FgetInt32();
- cols = state_fio->FgetInt32();
- rows = state_fio->FgetInt32();
- lines = state_fio->FgetInt32();
- TEXTVRAM = MEMORY_BASE + state_fio->FgetInt32();
- SYSROM2 = MEMORY_BASE + state_fio->FgetInt32();
- state_fio->Fread(EXTRAM, EXTRAM_SIZE, 1);
- state_fio->Fread(port60, sizeof(port60), 1);
- portC1 = state_fio->FgetUint8();
- portC8 = state_fio->FgetUint8();
- portCA = state_fio->FgetUint8();
- portCB = state_fio->FgetUint8();
- portCC = state_fio->FgetUint8();
- portCE = state_fio->FgetUint8();
- portCF = state_fio->FgetUint8();
- state_fio->Fread(palet, sizeof(palet), 1);
+ state_fio->StateInt32(bitmap);
+ state_fio->StateInt32(cols);
+ state_fio->StateInt32(rows);
+ state_fio->StateInt32(lines);
+ if(loading) {
+ TEXTVRAM = MEMORY_BASE + state_fio->FgetInt32_LE();
+ SYSROM2 = MEMORY_BASE + state_fio->FgetInt32_LE();
+ } else {
+ state_fio->FputInt32_LE((int)(TEXTVRAM - MEMORY_BASE));
+ state_fio->FputInt32_LE((int)(SYSROM2 - MEMORY_BASE));
+ }
+ state_fio->StateBuffer(EXTRAM, EXTRAM_SIZE, 1);
+ state_fio->StateBuffer(port60, sizeof(port60), 1);
+ state_fio->StateUint8(portC1);
+ state_fio->StateUint8(portC8);
+ state_fio->StateUint8(portCA);
+ state_fio->StateUint8(portCB);
+ state_fio->StateUint8(portCC);
+ state_fio->StateUint8(portCE);
+ state_fio->StateUint8(portCF);
+ state_fio->StateBuffer(palet, sizeof(palet), 1);
#endif
#endif
return true;
}
+}
OSDN Git Service
